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Reducing the Computational Complexity of Look-Ahead DD Conversion

  • Erwin Janssen
  • Arthur van Roermund
Part of the Analog Circuits and Signal Processing book series (ACSP)

Abstract

In this chapter the possibilities for reducing the computational load of look-ahead digital-to-digital conversion are explored. An analysis is made of the opportunities to reduce the number of computations required to perform full look-ahead. For small look-ahead depth it is possible to reduce the number of calculations, but for large look-ahead depths the savings that can be realized are limited, and ultimately the number of computations that are required per output symbol doubles with an increase of the look-ahead depth by one. As an alternative to full look-ahead, the possibilities for performing pruned look-ahead are explored. In this case not the full solution space is explored, but based on heuristics a small subset of all the solutions are investigated. This approach can realize a large reduction of the computational load, while the impact on the signal conversion performance can be made negligible small. Because of the potentially large advantage over full look-ahead, several ideas for realizing pruned look-ahead modulators are presented, that are explored in detail in the next chapters.

Keywords

Input Signal Impulse Response Clock Cycle Filter Output Loop Filter 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

  1. 5.
    J.A.S. Angus, A comparison of the “pruned-tree” versus “stack” algorithms for look-ahead sigma-delta modulators. Journal of the Audio Engineering Society 54(6) (2006) Google Scholar
  2. 14.
    R. Fano, A heuristic discussion of probabilistic decoding. IEEE Transactions on Information Theory 9, 64–74 (1963) CrossRefMathSciNetGoogle Scholar
  3. 19.
    P. Harpe, D. Reefman, E. Janssen, Efficient Trellis-type sigma-delta modulator, in Proceedings of the AES 114th Convention (2003). Preprint 5845, March 22–25, Amsterdam Google Scholar
  4. 27.
    E. Janssen, E. Knapen, D. Reefman, F. Bruekers, Lossless compression of one-bit audio, in Acoustics, Speech, and Signal Processing (ICASSP2004) (2004). May 17–41, Montreal. Invited paper Google Scholar
  5. 29.
    E. Janssen, D. Reefman, Advances in Trellis based SDM structures, in Proceedings of the AES 115th Convention (2003). Preprint 5993, October 10–13, New York Google Scholar
  6. 30.
    E. Janssen, D. Reefman, DSD compression for recent ultra high quality 1-bit coders, in Proceedings of the AES 118th Convention (2005). Preprint 6470, May 28–31, Barcelona Google Scholar
  7. 31.
    F. Jelinek, Fast sequential decoding algorithm using a stack. IBM Journal of Research and Development 13(6), 675–685 (1969). doi: 10.1147/rd.136.0675 CrossRefzbMATHMathSciNetGoogle Scholar
  8. 32.
    H. Kato, Trellis noise shaping converters architecture and evaluation, Technical Report 381, Technical Report of IEICE. EA, 2001 Google Scholar
  9. 33.
    H. Kato, Trellis noise-shaping converters and 1-bit digital audio, in Proceedings of the AES 112th Convention, May (2002). Preprint 5615, May 10–13, Munich Google Scholar
  10. 34.
    E. Knapen, D. Reefman, E. Janssen, F. Bruekers, Lossless compression of one-bit audio. Journal of the Audio Engineering Society 52(3), 190–199 (2004). Invited paper Google Scholar
  11. 42.
    Philips, Sony, Super Audio CD System Description (Philips Licensing, Eindhoven, 2002) Google Scholar

Copyright information

© Springer Science+Business Media B.V. 2011

Authors and Affiliations

  1. 1.Mixed Signal Circuits & SystemsNXP Semiconductors, Central R&DEindhovenThe Netherlands
  2. 2.Electrical Engineering, Mixed-signal Microelectronics GroupTechnical University EindhovenEindhovenThe Netherlands

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