ΣΔ Modulator Efficiency
A way of determining the quality of an A/D converter design is to evaluate its performance parameter-cost ratios. A Figure-of-Merit (FOM) relates ΣΔ modulator performance and cost parameters. With a FOM it can be determined whether a design efficiently uses its secondary inputs compared to other designs presented in literature. A benchmark over existing ΣΔ modulator implementations yields the state-of-art FOM with their individual performance and cost parameters as inputs.
The most important performance parameters for ΣΔ modulator are DR or peak SNR and HD3D. The most important ΣΔ modulator cost parameters are power consumption and silicon area. A conventional FOM, that relates power with bandwidth and ENOB (or DR) is available. This FOM is frequently misused to compare noise and distortion of different ADC implementations, but the mechanisms between power consumption and noise and the relation between power spending and distortion are completely different. Unfortunately, separate FOMs to benchmark ΣΔ modulator linearity or area are not available. This chapter will evaluate the conventional FOM, and will introduce new FOMs to benchmark the ADC dynamic range and linearity with the consumed power and area in separate FOMs. The FOMs discussed in this chapter are the conventional power efficiency FOM, a new power efficiency FOM, a new distortion FOM, and a new area FOM. These FOMs will be used to benchmark the ΣΔ modulators presented in this book with the ΣΔ modulators published in literature.
KeywordsPower Consumption Input Stage Load Impedance Weak Inversion Input Pair
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