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Very Low OSR Sigma-Delta Converters

  • Trevor C. Caldwell
Chapter

Abstract

This chapter investigates ΣΔ modulators and incremental A/D converters at low oversampling ratios. Both architectures have advantages at reduced OSRs; incremental A/D converters are able to achieve higher SQNR than ΣΔ modulators at oversampling ratios below 8, and ΣΔ modulators can attain better thermal noise performance than pipeline A/D converters at low OSRs. Both architectures are analyzed and a sample 8th-order cascaded architecture is demonstrated for both topologies.

Keywords

Clock Cycle Loop Filter Gain Stage Noise Transfer Function Signal Transfer Function 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

  1. 1.
    R. Schreier, G.C. Temes, Understanding Delta-Sigma Data Converters. (Wiley, New Jersey, 2005)Google Scholar
  2. 2.
    J. Silva, U. Moon, J. Steensgaard, G.C. Temes, Wideband low-distortion delta-sigma ADC topology. IEE Electron. Lett. 37, 737–738 (2001)CrossRefGoogle Scholar
  3. 3.
    J. Silva, U. Moon, G.C. Temes, Low-distortion delta-sigma topologies for MASH architectures, in Proc. IEEE International Symposium on Circuits and Systems, May 2004, pp. I1144–I1147Google Scholar
  4. 4.
    D.A. Johns, K. Martin, Analog Integrated Circuit Design. (Wiley, Toronto, 1997)Google Scholar
  5. 5.
    J. Steensgaard, Z. Zhang, W. Yu, A. Sarhegyi, L. Lucchese, D. Kim, G.C. Temes, Noise-power optimization of incremental data converters. IEEE Trans. Circuits Syst. I. 55, 1289–1296 (2008)CrossRefMathSciNetGoogle Scholar
  6. 6.
    J. Markus, J. Silva, G.C. Temes, Theory and applications of incremental ΣΔ converters. IEEE Trans. Circuits Syst. I. 51, 678–690 (2004)CrossRefGoogle Scholar
  7. 7.
    S. Kavusi, H. Kakavand, A.E. Gamal, On incremental sigma-delta modulation with optimal filtering. IEEE Trans. Circuits Syst. I. 53, 1004–1015 (2006)CrossRefGoogle Scholar
  8. 8.
    V. Quiquempoix, P. Deval, A. Barreto, G. Bellini, J. Collings, J. Markus, J. Silva, G.C. Temes, A low-power 22-bit incremental ADC. IEEE J. Solid-State Circuits, 41, 1562–1571 (2006)CrossRefGoogle Scholar
  9. 9.
    J. Robert, P. Deval, A second-order high-resolution incremental A/D converter with offset and charge injection compensation. IEEE J. Solid-State Circuits, 23, 736–741 (1988)CrossRefGoogle Scholar
  10. 10.
    R. Schreier, The Delta-Sigma Toolbox for Matlab (2009), http://www.mathworks.com/matlabcentral/fileexchange/19-delta-sigma-toolbox (The toolbox is generated in 2000 and updated in 2009)
  11. 11.
    B. Razavi, Design of Analog CMOS Integrated Circuits. (McGraw-Hill, New York, 2001)Google Scholar
  12. 12.
    J. Crols, M. Steyaert, Switched-opamp: an approach to realize full CMOS switched-capacitor circuits at very low power supply voltages. IEEE J. Solid-State Circuits, 29, 936–942 (1994)CrossRefGoogle Scholar
  13. 13.
    K. Nagaraj, H.S. Fetterman, J. Anidjar, S.H. Lewis, R.G. Renniger, A 250-mW, 8-b, 52-Msamples/s parallel-pipelined A/D converter with reduced number of amplifiers. IEEE J. Solid-State Circuits, 32, 312–320 (1997)CrossRefGoogle Scholar
  14. 14.
    N. Sokal, A. Sokal, Class E—A new class of high-efficiency tuned single-ended switching power amplifiers. IEEE JSSC. 10(3), 168–176 (1975)Google Scholar

Copyright information

© Springer Science+Business Media B.V. 2011

Authors and Affiliations

  • Trevor C. Caldwell
    • 1
  1. 1.Analog DevicesUniversity of TorontoTorontoCanada

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