Abstract
A new approach to model order reduction of passive linear circuits is proposed. It is based on the successive elimination of small inductances. Simultaneously with the inductance removal additional capacitances are connected to neighboring branches to provide first order accuracy of the reduced transfer functions. The passivity of the reduced circuit is easily verified. The proposed approach can be applied jointly with the widely used node elimination algorithm TICER.
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Gourary, M.M., Rusakov, S.G., Ulyanov, S.L., Zharov, M.M. (2011). Network Reduction by Inductance Elimination. In: Benner, P., Hinze, M., ter Maten, E. (eds) Model Reduction for Circuit Simulation. Lecture Notes in Electrical Engineering, vol 74. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-0089-5_8
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DOI: https://doi.org/10.1007/978-94-007-0089-5_8
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