End-to-End Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems

  • Jérémie Crenne
  • Pierre Bomel
  • Guy Gogniat
  • Jean-Philippe Diguet
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 73)


This chapter presents an end-to-end hierarchy of bitstreams repository for FPGA-based networked and partially reconfigurable systems. This approach targets embedded systems with very scare hardware resources taking advantage of dynamic, specific and optimized architectures. The hierarchy is based on three specific levels: FPGA local repository, local network repository and wide network repository. It allows the download of partial bitstreams depending on FPGA embedded resources and gives access to local or remote servers when a complete portfolio of bitstreams is needed. Based on real implementations and measurements, results show that the proposal is functional, use a very little of hardware and software memory, and exhibits a download and reconfiguration time faster than state of the art solutions.


Hardware Architecture User Datagram Protocol Packet Reception Circular Buffer Partial Reconfiguration 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Science+Business Media B.V. 2011

Authors and Affiliations

  • Jérémie Crenne
    • 1
  • Pierre Bomel
    • 1
  • Guy Gogniat
    • 1
  • Jean-Philippe Diguet
    • 1
  1. 1.LAB-STICCUniversité Européenne de BretagneLorientFrance

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