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Design of Multi-Step Analog to Digital Converters

  • Amir Zjajo
  • José Pineda de Gyvez
Chapter
Part of the Analog Circuits and Signal Processing book series (ACSP)

Abstract

In highly integrated telecommunication systems, moving analog-to-digital converters capable of IF sampling towards the high frequency front-end maximize economic-value exploiting system complexity and full integration. The goal of the A/D converter is to minimize analog filtering and to replace it with better controllable digital functions. System-on-chip, SoC, realizations require an A/D converter embedded in a large digital IC. To achieve the lowest cost, the system-on-chip has to be implemented in state-of-the-art CMOS technologies and must be area and power efficient and avoid the need for trimming to achieve the required accuracy. The rapidly decreasing feature size and power supply voltage of deep-submicron CMOS technology increases the pressure on converter requirements. As the supply voltage is scaled down, the voltage available to represent the signal is reduced. To maintain the same dynamic range on a lower supply voltage, the thermal noise of the circuit must also be proportionally reduced. In analog circuits, decreasing voltage supply consequently reduces the output swing, which reduces the SNR. This results in an increase of power consumption, which is determined by the SNR at a given frequency. Although several architectures can be embedded in SoC realizations, some of the drawbacks such as large amount of silicon and power of flash A/D converters, the matching of the inputs of several tens of folding amplifiers in the folding A/D converters and the larger latency for certain digital feedback loops in pipelined A/D converters, limits the choice to sub-ranging or two-step/multi-step architecture.

Keywords

Operational Amplifier Parasitic Capacitance Differential Pair Source Follower Residue Signal 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media B.V. 2011

Authors and Affiliations

  1. 1.Delft University of TechnologyDelftThe Netherlands
  2. 2.Eindhoven University of Technology, and NXP SemiconductorsEindhovenThe Netherlands

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