The primary task of synthesis approaches is to generate circuits that realize the desired functions. Secondarily, it should be ensured that the resulting circuits are as compact as possible. However, the results obtained by synthesis approaches often are sub-optimal. Consequently, in common design flows optimization approaches are applied after synthesis. In this chapter, three new optimization approaches are introduced—each with an own focus on a particular cost metric. The first one considers the reduction of the well-established quantum cost (used in quantum circuits) and the transistor cost (used in CMOS implementations), respectively. The second approach considers the line count in a circuit. Finally, an optimization method is introduced which takes so called Nearest Neighbor Cost (NNC) into account.


Truth Table Reversible Logic Quantum Circuit Quantum Gate Synthesis Approach 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. [BBC+95]
    A. Barenco, C.H. Bennett, R. Cleve, D.P. DiVinchenzo, N. Margolus, P. Shor, T. Sleator, J.A. Smolin, H. Weinfurter, Elementary gates for quantum computation. Am. Phys. Soc. 52, 3457–3467 (1995) Google Scholar
  2. [CS07]
    A. Chakrabarti, S. SurKolay, Nearest neighbour based synthesis of quantum boolean circuits. Eng. Lett. 15, 356–361 (2007) Google Scholar
  3. [DV02]
    B. Desoete, A. De Vos, A reversible carry-look-ahead adder using control gates. Integr. VLSI J. 33(1–2), 89–104 (2002) zbMATHCrossRefGoogle Scholar
  4. [FDH04]
    A.G. Fowler, S.J. Devitt, L.C.L. Hollenberg, Implementation of Shor’s algorithm on a linear nearest neighbour qubit array. Quantum Inf. Comput. 4, 237–245 (2004) MathSciNetzbMATHGoogle Scholar
  5. [IKY02]
    K. Iwama, Y. Kambayashi, S. Yamashita, Transformation rules for designing CNOT-based quantum circuits, in Design Automation Conf. (2002), pp. 419–424 Google Scholar
  6. [Kha08]
    M.H.A. Khan, Cost reduction in nearest neighbour based synthesis of quantum boolean circuits. Eng. Lett. 16, 1–5 (2008) Google Scholar
  7. [Kut06]
    S.A. Kutin, Shor’s algorithm on a nearest-neighbor machine, in Asian Conference on Quantum Information Science (2006). arXiv:quant-ph/0609001v1
  8. [Mas07]
    D. Maslov, Linear depth stabilizer and quantum fourier transformation circuits with no auxiliary qubits in finite neighbor quantum architectures. Phys. Rev. 76, 052310 (2007) CrossRefGoogle Scholar
  9. [MDM05]
    D. Maslov, G.W. Dueck, D.M. Miller, Toffoli network synthesis with templates. IEEE Trans. CAD 24(6), 807–817 (2005) Google Scholar
  10. [MWD10]
    D.M. Miller, R. Wille, R. Drechsler, Reducing reversible circuit cost by adding lines, in Int’l Symp. on Multi-Valued Logic (2010) Google Scholar
  11. [MYDM05]
    D. Maslov, C. Young, G.W. Dueck, D.M. Miller, Quantum circuit simplification using templates, in Design, Automation and Test in Europe (2005), pp. 1208–1213 Google Scholar
  12. [RO08]
    M. Ross, M. Oskin, Quantum computing. Commun. ACM 51(7), 12–13 (2008) CrossRefGoogle Scholar
  13. [SPMH03]
    V.V. Shende, A.K. Prasad, I.L. Markov, J.P. Hayes, Synthesis of reversible logic circuits. IEEE Trans. CAD 22(6), 710–722 (2003) Google Scholar
  14. [WGT+08]
    R. Wille, D. Große, L. Teuber, G.W. Dueck, R. Drechsler, RevLib: an online resource for reversible functions and reversible circuits, in Int’l Symp. on Multi-Valued Logic (2008), pp. 220–225. RevLib is available at
  15. [WSD09]
    R. Wille, M. Saeedi, R. Drechsler, Synthesis of reversible functions beyond gate count and quantum cost, in Int’l Workshop on Logic Synth. (2009), pp. 43–49 Google Scholar
  16. [WSD10]
    R. Wille, M. Soeken, R. Drechsler, Reducing the number of lines in reversible circuits, in Design Automation Conf. (2010) Google Scholar
  17. [ZM06]
    J. Zhong, J.C. Muzio, Using crosspoint faults in simplifying Toffoli networks, in IEEE North-East Workshop on Circuits and Systems (2006), pp. 129–132 Google Scholar

Copyright information

© Springer Science+Business Media B.V. 2010

Authors and Affiliations

  1. 1.Institute of Computer ScienceUniversity of BremenBremenGermany

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