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Abstract

Synthesis is the most important step while building complex circuits. In the last years, first approaches for reversible logic have been introduced. The first section of this chapter briefly reviews them. In particular, it is shown how irreversible functions must be embedded into reversible ones in order to become applicable to existing synthesis methods. Afterwards, two new synthesis approaches are introduced. While the first one exploits Binary Decision Diagrams, the second one makes use of a new programming language. This enables synthesis of more complex reversible circuits than by previous approaches.

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Notes

  1. 1.

    For the same reason, it is also not possible to preserve the values for low(v) or high(v), respectively, in the substitution depicted in the first row of Table 3.4.

  2. 2.

    For simplicity, it is assumed that no complement edges are applied.

  3. 3.

    Compared to Table 3.7, also benchmarks are considered for which no result could be determined using the w/o Shared Nodes approach.

  4. 4.

    Time for BDD-based Synthesis includes both, the time to build the BDD as well as to derive the circuit from it.

  5. 5.

    These extensions are not necessarily needed (i.e. they can also be expressed by the existing operations), but they allow a more intuitive programming of reversible circuits.

  6. 6.

    Figure 3.8(a) shows the notation for a single bit operation. For larger bit-widths the notation is extended accordingly.

  7. 7.

    A similar comparison to further work (e.g. [GAJ06, MDM07]) was not possible since due to memory limitations the respective benchmarks cannot be represented in terms of truth tables which is required by these approaches.

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Wille, R., Drechsler, R. (2010). Synthesis of Reversible Logic. In: Towards a Design Flow for Reversible Logic. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-9579-4_3

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  • DOI: https://doi.org/10.1007/978-90-481-9579-4_3

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