Abstract
Synthesis is the most important step while building complex circuits. In the last years, first approaches for reversible logic have been introduced. The first section of this chapter briefly reviews them. In particular, it is shown how irreversible functions must be embedded into reversible ones in order to become applicable to existing synthesis methods. Afterwards, two new synthesis approaches are introduced. While the first one exploits Binary Decision Diagrams, the second one makes use of a new programming language. This enables synthesis of more complex reversible circuits than by previous approaches.
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Notes
- 1.
For the same reason, it is also not possible to preserve the values for low(v) or high(v), respectively, in the substitution depicted in the first row of Table 3.4.
- 2.
For simplicity, it is assumed that no complement edges are applied.
- 3.
Compared to Table 3.7, also benchmarks are considered for which no result could be determined using the w/o Shared Nodes approach.
- 4.
Time for BDD-based Synthesis includes both, the time to build the BDD as well as to derive the circuit from it.
- 5.
These extensions are not necessarily needed (i.e. they can also be expressed by the existing operations), but they allow a more intuitive programming of reversible circuits.
- 6.
Figure 3.8(a) shows the notation for a single bit operation. For larger bit-widths the notation is extended accordingly.
- 7.
References
S. Abramsky, A structural approach to reversible computation. Theor. Comput. Sci. 347(3), 441–464 (2005)
K.S. Brace, R.L. Rudell, R.E. Bryant, Efficient implementation of a BDD package, in Design Automation Conf. (1990), pp. 40–45
R.E. Bryant, Graph-based algorithms for Boolean function manipulation. IEEE Trans. Comput. 35(8), 677–691 (1986)
R. Drechsler, N. Drechsler, W. Günther, Fast exact minimization of BDDs. IEEE Trans. CAD 19(3), 384–389 (2000)
P. Gupta, A. Agrawal, N.K. Jha, An algorithm for synthesis of reversible logic circuits. IEEE Trans. CAD 25(11), 2317–2330 (2006)
T. Grötker, S. Liao, G. Martin, S. Swan, System Design with SystemC (Kluwer Academic, Dordrecht, 2002)
W.N.N. Hung, X. Song, G. Yang, J. Yang, M. Perkowski, Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis. IEEE Trans. CAD 25(9), 1652–1663 (2006)
P. Kerntopf, A new heuristic algorithm for reversible logic synthesis, in Design Automation Conf. (2004), pp. 834–837
H. Liaw, C. Lin, On the OBDD-representation of general Boolean functions. IEEE Trans. Comput. 41, 661–664 (1992)
R. Lipsett, C. Schaefer, C. Ussery, VHDL: Hardware Description and Design (Kluwer Academic, Dordrecht, 1989)
D. Maslov, G.W. Dueck, Reversible cascades with minimal garbage. IEEE Trans. CAD 23(11), 1497–1509 (2004)
D. Maslov, G.W. Dueck, D.M. Miller, Toffoli network synthesis with templates. IEEE Trans. CAD 24(6), 807–817 (2005)
D. Maslov, G.W. Dueck, D.M. Miller, Techniques for the synthesis of reversible Toffoli networks. ACM Trans. Des. Autom. Electron. Syst. 12(4), 42 (2007)
D.M. Miller, D. Maslov, G.W. Dueck, A transformation based algorithm for reversible logic synthesis, in Design Automation Conf. (2003), pp. 318–323
S. Offermann, R. Wille, G.W. Dueck, R. Drechsler, Synthesizing multiplier in reversible logic, in IEEE Symp. on Design and Diagnostics of Electronic Circuits and Systems (2010), pp. 335–340
A. De Pierro, C. Hankin, H. Wiklicky, Reversible combinatory logic. Math. Struct. Comput. Sci. 16(4), 621–637 (2006)
K. Patel, I. Markov, J. Hayes, Optimal synthesis of linear reversible circuits. Quantum Inf. Comput. 8(3–4), 282–294 (2008)
R. Rudell, Dynamic variable ordering for ordered binary decision diagrams, in Int’l Conf. on CAD (1993), pp. 42–47
S. Sutherland, S. Davidmann, P. Flake, System Verilog for Design and Modeling (Kluwer Academic, Dordrecht, 2004)
F. Somenzi, CUDD: Cu Decision Diagram Package Release 2.3.1 (University of Colorado at Boulder, Boulder, 2001)
V.V. Shende, A.K. Prasad, I.L. Markov, J.P. Hayes, Synthesis of reversible logic circuits. IEEE Trans. CAD 22(6), 710–722 (2003)
E. Sentovich, K. Singh, L. Lavagno, C. Moon, R. Murgai, A. Saldanha, H. Savoj, P. Stephan, R. Brayton, A. Sangiovanni-Vincentelli, SIS: A system for sequential circuit synthesis. Technical Report, University of Berkeley (1992)
Y. Takahashi, N. Kunihiro, A linear-size quantum circuit for addition with no ancillary qubits. Quantum Inf. Comput. 5, 440–448 (2005)
R. Wille, R. Drechsler, BDD-based synthesis of reversible logic for large functions, in Design Automation Conf. (2009), pp. 270–275
R. Wille, R. Drechsler, Effect of BDD optimization on synthesis of reversible and quantum logic. Electron. Notes Theor. Comput. Sci. 253(6), 57–70 (2010). Proceedings of the Workshop on Reversible Computation (RC 2009)
I. Wegener, Branching Programs and Binary Decision Diagrams: Theory and Applications (Society for Industrial and Applied Mathematics, Philadelphia, 2000)
R. Wille, D. Große, L. Teuber, G.W. Dueck, R. Drechsler, RevLib: an online resource for reversible functions and reversible circuits, in Int’l Symp. on Multi-Valued Logic (2008), pp. 220–225. RevLib is available at http://www.revlib.org
R. Wille, S. Offermann, R. Drechsler, SyReC: A programming language for synthesis of reversible circuits, in Forum on Specification and Design Languages (2010)
S. Yang, Logic synthesis and optimization benchmarks user guide. Technical Report 1/95, Microelectronic Center of North Carolina (1991)
T. Yokoyama, R. Glück, A reversible programming language and its invertible self-interpreter, in Symp. on Partial Evaluation and Semantics-based Program Manipulation (2007), pp. 144–153
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Wille, R., Drechsler, R. (2010). Synthesis of Reversible Logic. In: Towards a Design Flow for Reversible Logic. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-9579-4_3
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