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Introduction

  • Yongquan Fan
  • Zeljko Zilic
Chapter

Abstract

This chapter brings out the motivation for our research, together with the rudimentary background information on high-speed serial interface standards. The chapter then enumerates the challenges that we are facing in high-speed serial interface testing, validation and debugging, and finally outlines our solutions to some of the most pressing challenges.

Keywords

Phase Lock Loop Automatic Test Equipment Jitter Performance Random Jitter Jitter Tolerance 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business media B.V. 2011

Authors and Affiliations

  1. 1.High Performance Analog, Texas InstrumentsDallasUSA
  2. 2.Department of Electrical & Computer EngineeringMcGill UniversityMontréalCanada

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