Skip to main content
SpringerLink
Log in
Book cover

60-GHz CMOS Phase-Locked Loops pp 57–149Cite as

Design of High Frequency Components

  • Chapter
  • First Online:

  • 1395 Accesses

Abstract

The design and implementation of the PLL front-end components, including the voltage controlled oscillator and the prescaler is presented in this chapter. The prescaler circuits include static and injection locked frequency dividers at 40 GHz and only the latter type for 60 GHz. A dual-mode ILFD is also presented to combine the functionality of divide-by-2 and divide-by-3 operation. The voltage controlled oscillators are also designed for 40 and 60 GHz operation frequencies. The 60 GHz circuits include an actively coupled and a transformer coupled version for quadrature signal generation. The last part of the chapter presents the combined front-end circuits.

This is a preview of subscription content, log in via an institution.

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD   109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Notes

  1. 1.

    The drain current of a MOSFET can be written as a power series with respect to the gate-source voltage, i.e. \( {i_d}({v_{gs}}) = {a_1}{v_{gs}} + {a_2}v_{gs}^2 + {a_3}v_{gs}^3 + \cdot \cdot \cdot \), where a3 is the second-derivative (\( g_m^{\prime\prime} \)) of its transconductance [82].

  2. 2.

    This design, published in [28], was carried out in cooperation with Pooyan Sakian, who is the first author of this publication.

  3. 3.

    The dual-mode ILFD can also be utilized in the 40 GHz front-end; however, due to time-constraints it was not implemented.

References

  1. P. Sakian, E. van der Heijden, H.M. Cheema, R. Mahmoudi, A. van Roermund, A 57-63 GHz Quadrature VCO in CMOS 65 nm. IEEE European Microwave Integrated Circuits Conference, Sept. 2009.

    Google Scholar 

  2. D. Kasperkovitz, D. Grenier, Travelling-wave dividers: a new concept for frequency division. Microelectron. Reliab. 16(2), 127–134 (1977)

    Article  Google Scholar 

  3. H.M. Cheema, R. Mahmoudi, M.A.T. Sanduleanu, A. van Roermund, A Ka band, static, MCML frequency divider, in standard 90nm-CMOS LP for 60 GHz applications. IEEE Radio Frequency Integrated Circuits Symposium, Atlanta, GA, June 2007, pp. 541–544

    Google Scholar 

  4. H. Knapp, H.D. Wohlmuth, M. Wurzer, M. Rest, 25 GHz static frequency divider and 25 Gb/s multiplexer in 0.12 μm CMOS. IEEE International Solid-State Circuits Conference, San Francisco, CA, Feb. 2002, pp. 302–468

    Google Scholar 

  5. Y. Mo, E. Skafidas, R. Evans, I. Mareels, 50 GHz static frequency divider in 130 nm CMOS. IET Electron. Lett. 44(4), 285–286 (2008)

    Article  Google Scholar 

  6. J. O. Plouchart, K. Jonghae, H. Recoules, N. Zamdmer, T. Yue, M. Sherony, A. Ray, L. Wagner, A power-efficient 33 GHz 2:1 static frequency divider in 0.12 μm SOI CMOS. IEEE Radio Frequency Integrated Circuits Symposium, June 2003, pp. 329–332

    Google Scholar 

  7. L. Tai-Cheng, L. Hua-Chin, H. Keng-Jan, H. Yen-Chuan, C. Guan-Jun, A 40-GHz distributed-load static frequency divider. IEEE Asian Solid-State Circuits Conference, Nov. 2005, pp. 205–208

    Google Scholar 

  8. G. von Buren, C. Kromer, F. Ellinger, A. Huber, M. Schmatz, H. Jackel, A combined dynamic and static frequency divider for a 40GHz PLL in 80nm CMOS. IEEE International Solid-State Circuits Conference, Feb. 2006, pp. 2462–247

    Google Scholar 

  9. H.D. Wohlmuth, D. Kehrer, W. Simburger, A high sensitivity static 2:1 frequency divider up to 19 GHz in 120 nm CMOS. IEEE Radio Frequency Integrated Circuits Symposium, June 2002, pp. 231–234

    Google Scholar 

  10. B. Kim, D.N. Helman, P.R. Gray, A 30-MHz hybrid analog/digital clock recovery circuit in 2-µm CMOS. IEEE J Solid-State Circuits 25(6), 1385–1394 (1990)

    Article  Google Scholar 

  11. M. Yamashina, H. Yamada, An MOS current mode logic (MCML) circuit for low-power sub-GHz processors. IEICE Trans Electron E75-C(10), 1181–1187 (1992)

    Google Scholar 

  12. Ali M. Niknejad, H. Hashemi, mm-Wave Silicon Technology: 60 GHz and Beyond (Springer, 2008)

    Book  Google Scholar 

  13. L. Bangli, C. Dianyong, W. Bo, C. Dezhong, T. Kwasniewski, A 43-GHZ static frequency divider in 0.13 μm standard CMOS. Canadian Conference on Electrical and Computer Engineering, May 2008, pp. 111–114

    Google Scholar 

  14. C. Jung-Yu, L. Shen-Iuan, A 4-54GHz static frequency divider with back-gate coupling. International Symposium on VLSI Design, Automation and Test, April 2007, pp. 1–4

    Google Scholar 

  15. D.D. Kim, C. Choongyeun, K. Jonghae, J.O. Plouchart, Wideband mmWave CML static divider in 65nm SOI CMOS technology. IEEE Custom Integrated Circuits Conference, Sept. 2008, pp. 627–634

    Google Scholar 

  16. E. Laskin, M. Khanpour, R. Aroca, K. W. Tang, P. Garcia, S. P. Voinigescu, A 95GHz receiver with fundamental-frequency VCO and static frequency divider in 65nm digital CMOS. IEEE International Solid-State Circuits Conference, Feb. 2008, pp. 180–605

    Google Scholar 

  17. D. Lim, K. Jonghae, J. O. Plouchart, C. Choongyeun, K. Daeik, R. Trzcinski, D. Boning, Performance variability of a 90GHz static CML frequency divider in 6nm SOI CMOS. IEEE International Solid-State Circuits Conference, Feb. 2007, pp. 542–621

    Google Scholar 

  18. J.O. Plouchart, K. Jonghae, V. Karam, R. Trzcinski, J. Gross, Performance variations of a 66GHz static CML divider in 90nm CMOS. IEEE International Solid-State Circuits Conference, Feb 2006, pp. 2142–2151

    Google Scholar 

  19. X.P. Yu, M.A. Do, J.G. Ma, K.S. Yeo, R. Wu, G.Q. Yan, 1 V 10 GHz CMOS frequency divider with low power consumption. IET Electron. Lett. 40(8), 467–469 (2004)

    Article  Google Scholar 

  20. S. Pellerano, S. Levantino, C. Samori, A.L. Lacaita, A 13.5-mW 5-GHz frequency synthesizer with dynamic-logic frequency divider. IEEE J. Solid-State Circuits 39(2), 378–383 (2004)

    Article  Google Scholar 

  21. J. Yuan, C. Svensson, Multigigahertz TSPC circuits in deep submicron CMOS. Phys. Scripta T79, 283–286 (1999)

    Article  Google Scholar 

  22. B.A. Floyd, L. Shi, Y. Taur, I. Lagnado, K.O. Kenneth, SOI and bulk CMOS frequency dividers operating above 15 GHz. IET Electron. Lett. 37(10), 617–618 (2001)

    Article  Google Scholar 

  23. Y. Hongyan, M. Biyani, K.O. Kenneth, A high-speed CMOS dual-phase dynamic-pseudo NMOS ((DP)2) latch and its application in a dual-modulus prescaler. IEEE J. Solid-State Circuits 34(10), 1400–1404 (1999)

    Article  Google Scholar 

  24. Jan M. Rabaey, A. Chandrakasan, B. Nikolic, Digital Integrated Circuits: A Design Perspective (Prentice-Hall, Englewoods Cliffs, NJ, 2003)

    Google Scholar 

  25. E. Lopelli, J. van der Tang, A. van Roermund, A sub-mA FH frequency synthesizer technique. IEEE Radio Frequency Integrated Circuits Symposium, June 2006

    Google Scholar 

  26. R.L. Miller, Fractional-frequency generators utilizing regenerative modulation. Proc IRE 27(7), 446–457 (1939)

    Article  Google Scholar 

  27. J. Lee, B. Razavi, A 40-GHz frequency divider in 0.18-µm CMOS technology. IEEE J. Solid-State Circuits 39(4), 594–601 (2004)

    Article  Google Scholar 

  28. L. Tang-Nian, B. Shuen-Yin, Y.J.E. Chen, A 60-GHz 0.13 μm CMOS divide-by-three frequency divider. IEEE Trans. Microw. Theory Tech. 56(11), 2409–2415 (2008)

    Article  Google Scholar 

  29. U. Singh, M.M. Green, High-frequency CML clock dividers in 0.13 μm CMOS operating up to 38 GHz. IEEE J. Solid-State Circuits 40(8), 1658–1661 (2005)

    Article  Google Scholar 

  30. B. Razavi, A study of injection locking and pulling in oscillators. IEEE J. Solid-State Circuits 39(9), 1415–1424 (2004)

    Article  Google Scholar 

  31. W. Hui, Z. Lin, A 16-to-18GHz 0.18-m Epi-CMOS divide-by-3 injection-locked frequency divider. IEEE International Solid-State Circuits Conference, Feb. 2006, pp. 2482–2491

    Google Scholar 

  32. C. Wei-Zen, K. Chien-Liang, 18 GHz and 7 GHz superharmonic injection-locked dividers in 0.25µm CMOS technology. IEEE European Solid-State Circuits Conference, Sept. 2002, pp. 89–92

    Google Scholar 

  33. C. Jun-Chau, L. Liang-Hung, Analysis and design of wideband injection-locked ring oscillators with multiple-input injection. IEEE J. of Solid-State Circuits 42(9), 1906–1915 (2007)

    Article  Google Scholar 

  34. L. Liang-Hung, C. Jun-Chau, A wide-band CMOS injection-locked ring oscillator. IEEE Microw. Wireless Components Lett. 15(10), 676–678 (2005)

    Article  Google Scholar 

  35. T. Haitao, C. Shanfeng, A.I. Karsilayan, J.S. Martinez, An injection-locked frequency divider with multiple highly nonlinear injection stages and large division ratios. IEEE Trans. Circuits Syst. II: Express Briefs 54(4), 313–317 (2007)

    Article  Google Scholar 

  36. C. Shanfeng, T. Haitao, S. Jose, l.K. Aydn, A fully differential low-power divide-by-8 injection-locked frequency divider up to 18 GHz. IEEE Journal of Solid-State Circuits 42(3), 583–591 (2007)

    Article  Google Scholar 

  37. W. Hui, A. Hajimiri, A 19 GHz 0.5 mW 0.35 µm CMOS frequency divider with shunt-peaking locking-range enhancement. IEEE International Solid-State Circuits Conference, Feb. 2001, pp. 412–413, 471

    Google Scholar 

  38. M. Tiebout, A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider. IEEE J. Solid-State Circuits 39(7), 1170–1174 (2004)

    Article  Google Scholar 

  39. S.L. Jang, C.C. Liu, J.F. Huang, A wide locking range injection locked frequency divider with quadrature outputs. IEICE Trans Electron E91-C(3), 373–377 (2008)

    Article  Google Scholar 

  40. D. Yanping, K.O. Kenneth, A 21-GHz 8-modulus prescaler and a 20-GHz phase-locked loop fabricated in 130-nm CMOS. IEEE J. Solid-State Circuits 42(6), 1240–1249 (2007)

    Article  Google Scholar 

  41. P. Staric, E. Margan, Wideband Amplifiers (Springer, Dordrecht, The Netherlands, 2007)

    Google Scholar 

  42. C. Wei-Zen, C. Wen-Hui, H. Kuo-Ching, Three-dimensional fully symmetric inductors, transformer, and balun in CMOS technology. IEEE Trans. Circuits Systems I: Regular Papers 54(7), 1413–1423 (2007)

    Article  Google Scholar 

  43. W. Chia-Hsin, T. Chih-Chun, L. Shen-Iuan, Analysis of on-chip spiral inductors using the distributed capacitance model. IEEE J. Solid-State Circuits 38(6), 1040–1044 (2003)

    Article  Google Scholar 

  44. T.H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits (Cambridge University Press, New York, 2003)

    Google Scholar 

  45. R. Adler, A study of locking phenomena in oscillators. Proc. IRE 34(6), 351–357 (1946)

    Article  Google Scholar 

  46. S. Verma, H.R. Rategh, T.H. Lee, A unified model for injection-locked frequency dividers. IEEE J. Solid-State Circuits 38(6), 1015–1027 (2003)

    Article  Google Scholar 

  47. H.R. Rategh, T.H. Lee, Superharmonic injection-locked frequency dividers. IEEE J. Solid-State Circuits 34(6), 813–821 (1999)

    Article  Google Scholar 

  48. B. Razavi, Design of Integrated Circuits for Optical Communications (McGraw-Hill Science, New York, 2002)

    Google Scholar 

  49. P. Andreani, A. Bonfanti, L. Romano, C. Samori, Analysis and design of a 1.8-GHz CMOS LC quadrature VCO. IEEE J. Solid-State Circuits 37(12), 1737–1747 (2002)

    Article  Google Scholar 

  50. X.P. Yu, H.M. Cheema, R. Mahmoudi, A. van Roermund, X.L. Yan, A 3 mW 54.6 GHz divide-by-3 injection locked frequency divider with resistive harmonic enhancement. IEEE Microw. Wireless Components Lett. 19(9), 575–577 (2009)

    Article  Google Scholar 

  51. J. Lin, M. Jian-Guo, S.Y. Kiat, A.D. Manh, 9.3-10.4-GHz-band cross-coupled complementary oscillator with low phase-noise performance. IEEE Trans. Microw. Theory Tech. 52(4), 1273–1278 (2004)

    Article  Google Scholar 

  52. J. Jin, X.P. Yu, J.J. Zhou, T.T. Yan, Gigahertz range injection locked frequency dividers with band-width enhancement and supply rejection. IET Electron. Lett. 44(17), 999–1000 (2008)

    Article  Google Scholar 

  53. V. Aparin, G. Brown, L. E. Larson, Linearization of CMOS LNA's via optimum gate biasing. IEEE International Symposium on Circuits and Systems, May 2004, pp. IV-748–IV-751

    Google Scholar 

  54. C. Hsien-Ku, C. Da-Chiang, J. Ying-Zong, L. Shey-Shi, A 30-GHz wideband low-power CMOS injection-locked frequency divider for 60-GHz wireless-LAN. IEEE Microw. Wireless Components Lett. 18(2), 145–147 (2008)

    Article  Google Scholar 

  55. H. K. Chen, C. Hsien-Jui, D. C. Chang, Y. Z. Juang, Y. Yu-Che, S. S. Lu, A mm-wave CMOS multimode frequency divider. IEEE International Solid-State Circuits Conference, Feb. 2009, pp. 280–281,281a

    Google Scholar 

  56. D.J. Cassan, J.R. Long, A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18µm CMOS. IEEE J. Solid-State Circuits 38(3), 427–435 (2003)

    Article  Google Scholar 

  57. C. Jun-Chau, L. Liang-Hung, 40GHz wide-locking-range regenerative frequency divider and low-phase-noise balanced VCO in 0.18µm CMOS. IEEE International Solid-State Circuits Conference, Feb. 2007, pp. 544–621

    Google Scholar 

  58. L. Shao-Hua, S.L. Jang, C. Yun-Hsueh, A low voltage divide-by-4 injection locked frequency divider with quadrature outputs. IEEE Microw. Wireless Components Lett. 17(5), 373–375 (2007)

    Article  Google Scholar 

  59. L. Tang-Nian, Y.J.E. Chen, A 0.8-mW 55-GHz dual-injection-locked CMOS frequency divider. IEEE Trans. Microw. Theory Tech. 56(3), 620–625 (2008)

    Article  Google Scholar 

  60. J. van der Tang, High-Frequency Oscillator Design for Integrated Transceivers, Ph.D. dissertation, Eindhoven University of Technology, 2002

    Google Scholar 

  61. A. Hajimiri, S. Limotyrakis, T.H. Lee, Jitter and phase noise in ring oscillators. IEEE J. Solid-State Circuits 34(6), 790–804 (1999)

    Article  Google Scholar 

  62. J.O. Plouchart, K. Jonghae, N. Zamdmer, M. Sherony, T. Yue, Y. Meeyoung, M. Talbi, A. Ray, L. Wagner, A 31 GHz CML ring VCO with 5.4 ps delay in a 0.12 µm SOI CMOS technology. IEEE European Solid-State Circuits Conference, Sept. 2003, pp. 357–360

    Google Scholar 

  63. W. Hui, A. Hajimiri, Silicon-based distributed voltage-controlled oscillators. IEEE J. Solid-State Circuits 36(3), 493–502 (2001)

    Article  Google Scholar 

  64. L. Lianming, P. Reynaert, M. Steyaert, A 90nm CMOS mm-wave VCO using an LC tank with inductive division. IEEE European Solid-State Circuits Conference, Sept. 2008, pp. 238–241

    Google Scholar 

  65. K.W. Tang, S. Leung, N. Tieu, P. Schvan, S.P. Voinigescu, Frequency scaling and topology comparison of millimeter-wave CMOS VCOs. IEEE Compound Seminconductor Integrated Circuit Symposium, Nov. 2006, pp. 55–58

    Google Scholar 

  66. B. Heydari, M. Bohsali, E. Adabi, A.M. Niknejad, Millimeter-wave devices and circuit blocks up to 104 GHz in 90 nm CMOS. IEEE J. Solid-State Circuits 42(12), 2893–2903 (2007)

    Article  Google Scholar 

  67. L.M. Franca-Neto, R.E. Bishop, B.A. Bloechel, 64 GHz and 100 GHz VCOs in 90 nm CMOS using optimum pumping method. IEEE International Solid-State Circuits Conference, Feb. 2004, pp. 444–538

    Google Scholar 

  68. C. Changhua, K.O. Kenneth, Millimeter-wave voltage-controlled oscillators in 0.13-µm CMOS technology. IEEE J. Solid-State Circuits 41(6), 1297–1304 (2006)

    Article  Google Scholar 

  69. A.P. van der Wel, S.L.J. Gierkink, R.C. Frye, V. Boccuzzi, B. Nauta, A robust 43-GHz VCO in CMOS for OC-768 SONET applications. IEEE J. Solid-State Circuits 39(7), 1159–1163 (2004)

    Article  Google Scholar 

  70. D.B. Leeson, A simple model of feedback oscillator noise spectrum. Proc. IEEE 54(2), 329–330 (1966)

    Article  Google Scholar 

  71. J.J. Rael, A.A. Abidi, Physical processes of phase noise in differential LC oscillators. IEEE Custom Integrated Circuits Symposium, May 2000, pp. 569–572

    Google Scholar 

  72. A. Hajimiri, T.H. Lee, A general theory of phase noise in electrical oscillators. IEEE J. Solid-State Circuits 33(2), 179–194 (1998)

    Article  Google Scholar 

  73. J. Craninckx, M. Steyaert, Low-noise voltage-controlled oscillators using enhanced LC-tanks. IEEE Trans. Circuits Syst. II: Analog Digit. Signal Process. 42(12), 794–804 (1995)

    Article  Google Scholar 

  74. B. Razavi, A study of phase noise in CMOS oscillators. IEEE J. Solid-State Circuits 31(3), 331–343 (1996)

    Article  Google Scholar 

  75. E. Hegazi, H. Sjoland, A.A. Abidi, A filtering technique to lower LC oscillator phase noise. IEEE J. Solid-State Circuits 36(12), 1921–1930 (2001)

    Article  Google Scholar 

  76. R. Aparicio, A. Hajimiri, A CMOS differential noise-shifting Colpitts VCO. IEEE International Solid-State Circuits Conference, Feb. 2002, pp. 288-289

    Google Scholar 

  77. P. Andreani, S. Mattisson, On the use of MOS varactors in RF VCOs. IEEE J. Solid-State Circuits 35(6), 905–910 (2000)

    Article  Google Scholar 

  78. H. Ainspan, J. O. Plouchart, A comparison of MOS varactors in fully-integrated CMOS LC VCO's at 5 and 7 GHz. IEEE European Solid-State Circuits Conference, Sept. 2000, pp. 447–450

    Google Scholar 

  79. N. Fong, G. Tarr, N. Zamdmer, J. O. Plouchart, C. Plett, Accumulation MOS varactors for 4 to 40 GHz VCOs in SOI CMOS. IEEE International SOI Conference, Oct. 2002, pp. 158–160

    Google Scholar 

  80. T. Soorapanth, C. P. Yue, D. K. Shaeffer, T. I. Lee, S. S. Wong, Analysis and optimization of accumulation-mode varactor for RF ICs. IEEE Symposium on VLSI Circuits, June 1998, pp. 32–33

    Google Scholar 

  81. K. Jonghae, J. O. Plouchart, N. Zamdmer, R. Trzcinski, W. Kun, B. J. Gross, K. Moon, A 44GHz differentially tuned VCO with 4GHz tuning range in 0.12 μm SOI CMOS. IEEE International Solid-State Circuits Conference, Feb. 2005, pp. 416–607

    Google Scholar 

  82. N. Fong, J.O. Plouchart, N. Zamdmer, L. Duixian, L. Wagner, C. Plett, G. Tarr, A 1 V 3.8-5.7 GHz differentially-tuned VCO in SOI CMOS. IEEE Radio Frequency Integrated Circuits Symposium, June 2002, pp. 75–78

    Google Scholar 

  83. M. Tiebout, Low-power low-phase-noise differentially tuned quadrature VCO design in standard CMOS. IEEE Journal of Solid-State Circuits 36(7), 1018–1024 (2001)

    Article  Google Scholar 

  84. J.P. Carr, B.M. Frank, A 38 GHz accumulation MOS differentially tuned VCO design in 0.18-µm CMOS. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Jan. 2006

    Google Scholar 

  85. F. Neric, K. Jonghae, J. O. Plouchart, N. Zamdmer, L. Duixian, L. Wagner, C. Plett, G. Tarr, A low-voltage 40-GHz complementary VCO with 15% frequency tuning range in SOI CMOS technology. IEEE Journal of Solid-State Circuits, 39(5), 841–846 (2004)

    Article  Google Scholar 

  86. L. Tang-Nian, B. Shuen-Yin, E. C. Yi-Jan, C. Hsin-Shu, H. Deukhyoun, A 1-V CMOS VCO for 60-GHz applications. IEEE Asia-Pacific Microwave Conference, Dec. 2005.

    Google Scholar 

  87. D. D. Kim, K. Jonghae, J. O. Plouchart, C. Choongyeun, L. Weipeng, L. Daihyun, R. Trzcinski, M. Kumar, C. Norris, D. Ahlgren, A 70GHz manufacturable complementary LC-VCO with 6.14GHz tuning range in 65nm SOI CMOS. IEEE International Solid-State Circuits Conference, Feb. 2007, pp. 540–620.

    Google Scholar 

  88. F. Ellinger, T. Morf, G. Buren, C. Kromer, G. Sialm, L. Rodoni, M. Schmatz, H. Jackel, 60 GHz VCO with wideband tuning range fabricated on VLSI SOI CMOS technology. IEEE International Microwave Symposium, June 2004, pp. 1329–1332

    Google Scholar 

  89. J. Borremans, M. Dehan, K. Scheir, M. Kuijk, P. Wambacq, VCO design for 60 GHz applications using differential shielded inductors in 0.13 µm CMOS. IEEE Radio Frequency Integrated Circuits Symposium, June 2008, pp. 135–138

    Google Scholar 

  90. K. Kwok, H.C. Luong, Ultra-low-Voltage high-performance CMOS VCOs using transformer feedback. IEEE J. Solid-State Circuits 40(3), 652–660 (2005)

    Article  Google Scholar 

  91. A.W.L. Ng, H.C. Luong, A 1-V 17-GHz 5-mW CMOS quadrature VCO based on transformer coupling. IEEE J. Solid-State Circuits 42(9), 1933–1941 (2007)

    Article  Google Scholar 

  92. L. Zhenbiao, K.O. Kenneth, A low-phase-noise and low-power multiband CMOS voltage-controlled oscillator. IEEE J. Solid-State Circuits 40(6), 1296–1302 (2005)

    Article  Google Scholar 

  93. N.H.W. Fong, J.O. Plouchart, N. Zamdmer, L. Duixian, L.F. Wagner, C. Plett, N.G. Tarr, Design of wide-band CMOS VCO for multiband wireless LAN applications. IEEE J. Solid-State Circuits 38(8), 1333–1342 (2003)

    Article  Google Scholar 

  94. B. Catli, M.M. Hella, A 0.5-V 3.6/5.2 GHz CMOS multi-band LC VCO for ultra low-voltage wireless applications. IEEE International Symposium on Circuits and Systems, May 2008, pp. 996–999

    Google Scholar 

  95. A. Goel, H. Hashemi, Concurrent dual-frequency oscillators and phase-locked loops. IEEE Trans. Microw. Theory Tech. 56(8), 1846–1860 (2008)

    Article  Google Scholar 

  96. N.T. Tchamov, S.S. Broussev, I.S. Uzunov, K.K. Rantala, Dual-band LC VCO architecture with a fourth-order resonator. IEEE Trans. Circuits Syst. II: Express Briefs 54(3), 277–281 (2007)

    Article  Google Scholar 

  97. B. Catli, M.M. Hella, A dual band, wide tuning range CMOS voltage controlled oscillator for multi-band radio. IEEE Radio Frequency Integrated Circuits Symposium, June 2007, pp. 595–598

    Google Scholar 

  98. T. Sai-Wang, Y. Hsing-Ting, K. Yanghyo, E. Socher, M.C.F. Chang, T. Itoh, A dual band mm-wave CMOS oscillator with left-handed resonator. IEEE Radio Frequency Integrated Circuits Symposium, June 2009, pp. 477–480

    Google Scholar 

  99. R. Sujiang, H.C. Luong, A 1V 4GHz-and-10GHz transformer-based dual-band quadrature VCO in 0.18-µm CMOS. IEEE Custom Integrated Circuits Conference, Sept. 2007, pp. 817–820

    Google Scholar 

  100. A. Mazzanti, P. Uggetti, R. Battagia, F. Svelto, Analysis and design of a dual band reconfigurable VCO. IEEE International Conference on Electronics, Circuits and Systems, Dec. 2004, pp. 37–40

    Google Scholar 

  101. L.K.L. Lincoln, W.C.C. Kay, C.L. Howard, A 1V dual-band VCO using an integrated variable inductor. IEEE Asian Solid-State Circuits Conference, Nov. 2005, pp. 273–276

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Electrical Engineering, Eindhoven University of Technology, Den Dolech 2, 5600, MB, Eindhoven, Netherlands

    Hammad M. Cheema & Reza Mahmoudi

  2. Dept. Electrical Engineering, Eindhoven University of Technology, Eindhoven, Netherlands

    Dr. Arthur H. M. van Roermund

Authors
  1. Hammad M. Cheema
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Reza Mahmoudi
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Dr. Arthur H. M. van Roermund
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Hammad M. Cheema .

Rights and permissions

Reprints and permissions

Copyright information

© 2010 Springer Science+Business Media B.V.

About this chapter

Cite this chapter

Cheema, H.M., Mahmoudi, R., van Roermund, A.H.M. (2010). Design of High Frequency Components. In: 60-GHz CMOS Phase-Locked Loops. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-9280-9_4

Download citation

  • DOI: https://doi.org/10.1007/978-90-481-9280-9_4

  • Published:

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-90-481-9279-3

  • Online ISBN: 978-90-481-9280-9

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics

Search

Navigation