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Hardware Security Challenges

  • Ted HuffmireEmail author
  • Cynthia Irvine
  • Thuy D. Nguyen
  • Timothy Levin
  • Ryan Kastner
  • Timothy Sherwood
Chapter

Abstract

This chapter discusses the problem of malicious hardware, or gateware, on FPGAs. Categories of malicious hardware, the problem of foundry trust, and attacks facilitated by malicious inclusions are presented. This chapter also explains the problem of covert channels on FPGAs, with a formal definition of a covert channel in general and a description of the specific case of covert channels on FPGAs. Methods for detecting and mitigating these covert channels are also described.

Keywords

Smart Card Cache Line Covert Channel Defense Advance Research Project Agency Side Channel Attack 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media B.V. 2010

Authors and Affiliations

  • Ted Huffmire
    • 1
    Email author
  • Cynthia Irvine
    • 1
  • Thuy D. Nguyen
    • 1
  • Timothy Levin
    • 1
  • Ryan Kastner
    • 2
  • Timothy Sherwood
    • 3
  1. 1.Department of Computer ScienceNaval Postgraduate SchoolMontereyUSA
  2. 2.Dept. of Computer Science and Eng.University of California, San DiegoLa JollaUSA
  3. 3.Department of Computer ScienceUC, Santa BarbaraSanta BarbaraUSA

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