Design of an Open-Loop T&H Circuit

Abstract

This chapter presents the design and implementation of an open-loop T&H circuit. The current state-of-art in T&H design is discussed first. Then, after analyzing two alternative topologies for the implementation of the buffer, one specific topology is selected for the final implementation. Simulations and experimental results are shown and the performance is compared against existing solutions. In Chapters 8 and 9, smart calibration techniques will be added to the presented T&H design to further enhance the performance for either higher accuracy or time-interleaved operation. Parts of this chapter have been published previously in [61, 62].