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Surface-Potential-Based Compact Model of Bulk MOSFET

  • Gennady Gildenblat
  • Weimin Wu
  • Xin Li
  • Ronald van Langevelde
  • Andries J. Scholten
  • Geert D. J. Smit
  • Dirk B. M. Klaassen

Abstract

We review surface-potential-based approach to compact modeling of bulk MOS transistors and provide introduction to the widely used PSP model jointly developed by the Arizona State University and NXP Semiconductors. The emphasis is on the interplay between the mathematical structure of the compact model and its capabilities for the circuit design applications.

Keywords

Flicker Noise Compact Model Surface Electric Field MOSFET Model Terminal Charge 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Notes

Acknowledgments

This work is supported in part by the Semiconductor Research Corporation and by the Compact Model Council (CMC). The detailed evaluation by the CMC members of several versions of the PSP model is deeply appreciated. The authors are much indebted to Dr. C.C. McAndrew for the numerous discussions of the material presented in this chapter. We are grateful to Dr. J. Watts for the test data shown in Fig. 1.14 and to G. Dessai for reading the manuscript and numerous useful comments.

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Copyright information

© Springer Science+Business Media B.V. 2010

Authors and Affiliations

  • Gennady Gildenblat
    • 1
  • Weimin Wu
    • 1
  • Xin Li
    • 1
  • Ronald van Langevelde
    • 2
  • Andries J. Scholten
    • 3
  • Geert D. J. Smit
    • 3
  • Dirk B. M. Klaassen
    • 3
  1. 1.Ira A. Fulton School of Engineering, Department of Electrical EngineeringArizona State UniversityTempeUSA
  2. 2.Philips Research EuropeEindhovenThe Netherlands
  3. 3.NXP-TSMC Research CenterEindhovenThe Netherlands

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