• Antonio Carlos Schneider Beck Fl.
  • Luigi Carro


This introductory chapter presents several challenges that architectures are facing these days, such as the imminent end of the Moore’s law as it is known today; the usage of future technologies that will replace silicon; the stagnation of ILP increase in superscalar processors and their excessive power consumption and, most importantly, how the aforementioned aspects are impacting on the development of new architectural alternatives. All these aspects point to the fact that new architectural solutions are necessary. Then, the main reasons that motivated the writing of this book are shown. Several aspects are discussed, as the why ILP does not increase as before; the use of both combinational logic and reconfigurable fabric to speedup execution of data dependent instructions; the importance of maintaining binary compatibility, which is the possibility of reusing previously compiled code without any kind of modification; yield issues and the costs of fabrication. This chapter ends with a brief review of what will be seen in the rest of the book.


Pipeline Stage Combinational Logic Branch Prediction ASIC Design Branch Predictor 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Science+Business Media B.V. 2010

Authors and Affiliations

  • Antonio Carlos Schneider Beck Fl.
    • 1
  • Luigi Carro
    • 1
  1. 1.Instituto de InformáticaUniversidade Federal do Rio Grande do Sul (UFRGS)Porto AlegreBrazil

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