Abstract
In this paper a reconfigurable architecture for Ethernet and HomePNA MAC is presented. By using this new architecture, Ethernet and HomePNA reconfigurable network card can be produced. This architecture has been implemented using VHDL language and after that synthesized on a chip. The differences between HomePNA (synchronized and unsynchronized mode) and Ethernet in collision detection mechanism and priority access to media have caused the need to separate architectures for Ethernet and HomePNA, but by using similarities of them, both the Ethernet and the HomePNA can be implemented in a single chip with a little extra hardware. The number of logical elements of the proposed architecture is increased by 19% in compare to when only an Ethernet MAC is implemented
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References
ITU-T Recommendation,”Phone Line Networking Transceivers
Foundation,” G.989.1, 2001
ITU-T Recommendation,”Phone line Networking Transceivers – Payload Format and Link Layer Requirements,” G.989.2, 2001.
ITU-T Recommendation,”Phone line Networking Transceivers – Isolation Function,” G.989.3, 2003.
ITU-T Recommendation, ”Phone line Networking Transceivers – Enhanced Physical, Media Access, and Link Layer Specifications,” G.9954, 2005
IEEE STD 802.3-2002®, “Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications,” 2002.
T. Zahariadis, K. Pramataris, N. Zervos, "A Comparison of Competing Broadband in Home Technologies," Electronics & Communication Engineering Journal, vol.14, pp: 133–142, 2002.
S. Kangude, J. Copeland, M. Sherman,”An Analysis of the HomePNA Collision Resolution Mechanism,” 28th IEEE Conference on Local Computer Networks LCN, Vol.4, pp: 1618–1626, 2003.
S. Kangude, M. Sherman, J. Copeland,”Optimality Analysis of the HomePNA Collision Resolution Mechanism,” Georgia Tech CSC Technical Report GIT-CSC-04, vol.10, pp: 11100–1110, 2004.
B. Amodei, L. Costa, O. Duarte,”Increasing the Throughput of the HomePNA MAC Protocol,” Local Computer Networks, vol.5, pp: 120–130, 2004
W. Wada, M. Tode, H. Murakami, "Home MAC: QoS-Based MAC Protocol for the Home Network," The 7th International Symposium on Computers and Communications, ISCC, pp: 407–414, 2002
M. Chung, H. Kim, T. Lee,”HomePNA 2.0-Saturation Throughput Analysis,” IEEE Communications Letters, vol.5, pp: 1324–1332, 2003
H. Kim, M. Chung, T. Lee, J. Park, “Saturation Throughput Analysis of Collision Management Protocol in the HomePNA 3.0 Asynchronous MAC Mode,” IEEE Communications Letters, vol.8, No.7, pp: 476–478, 2004
P. Bisaglia, R. Castle, "Receiver Architectures for HomePNA 2.0," Global Telecommunications Conference, GLOBECOM, vol.2, pp: 861–866, 2001
P. Bisaglia, R. Castle, S. Baynham, “Channel Modeling and System Performance for HomePNA 2.0,” IEEE Journal on Selected Areas in Communications, vol.20, No.5, pp: 913–922, 2002.
Shin, J. Choi, J. Lim, S. Noh, N. Baek, J. Lee, "A 3.3-V analog front-end chip for HomePNA applications," The 2001 IEEE International Symposium on Circuits and Systems ISCAS, vol.4, pp: 698–701, 2001
http://www.homepna.org, 2007.
IEEE STD 802.1H, “IEEE Standards for Local and Metropolitan Area Networks: Recommended Practice for Media Access Control (MAC) Bridging of Ethernet V2.0 in IEEE 802 Local Area Networks,” 1995.
IEEE STD 802.2c, "Information technology - telecommunications and information exchange between systems - local and metropolitan area networks - specific requirements. Part 2: logical link control," 1994.
IEEE STD 802.2, "Information technology - telecommunications and information exchange between systems - local and metropolitan area networks - specific requirements. Part 2: logical link control," 1998.
Tanenbaum, "Computer Network," pub: Prentice Hall, Fourth Edition, 2002.
Sh. Mazloman, A. Motamedi. M. Sedighi “design of a Ethernet controller and implementation on FPGA” AmirKabir Uni
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KhalilyDermany, M., HosseinGhadiry, M. (2010). A Reconfigurable Design and Architecture of the Ethernet and HomePNA3.0 MAC. In: Elleithy, K. (eds) Advanced Techniques in Computing Sciences and Software Engineering. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-3660-5_4
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DOI: https://doi.org/10.1007/978-90-481-3660-5_4
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