Ethernet MAC Verification by Efficient Verification Methodology for SOC Performance Improvement

  • Sridevi Chitti
  • P. Chandrasekhar
  • M. Asharani
  • G. Krishnamurthy
Conference paper
Part of the Smart Innovation, Systems and Technologies book series (SIST, volume 44)

Abstract

Verification of Gigabit Ethernet Media Access Control (MAC), part of most of the networking SOC is accomplished by using the most advanced verification methodology i.e. Universal Verification Methodology (UVM) has been presented in this paper. The main function of MAC is to forward Ethernet frames to PHY through interface and vice versa. With the use of UVM factory and configuration mechanism, coverage driven verification of MAC Characteristics such as frame transmission, frame reception etc. is achieved in best possible way. Coverage metrics and self-checking which reduces the time spent on verifying design. By using UVM methodology, a reusable test bench is developed which has been used to run different test scenarios on same TB environment.

Keywords

UVM MAC Verification IP Gigabit ethernet TB environment 

Notes

Acknowledgments

Authors would like to express sincere thanks to Department of Science and Technology, New Delhi for their financial support to carry out this work under project Grant No. SR/WOS-A/ET-17/2012(G). Further our sincere feelings and gratitude to management and principal of Sumathi Reddy Institute of Technology for Women, for their support and encouragement to carry out the research work.

References

  1. 1.
    Chauhan, P., Clarke, E.M., Lu, Y., Wang, D.: Verifying IP core based system-on-chip designs. Carnegie Mellon University Research ShowcaseGoogle Scholar
  2. 2.
    Samanta, P., Chauhan, D., Deb, S., Gupta, P.K.: UVM based STBUS Verification IP for Verifying SOC Architectures. In: Proceedings of IEEE VLSI Design and Test, 18th International Symposium, doi: 10.1109/ISVDAT.2014.6881037, Coimbatore, July 2014
  3. 3.
    Vaidya, B., Pithadiya, N.: An introduction to universal verification methodology. J. Inf. Knowl. Res. Electron. Commun. Eng. 2, Nov-12 to Oct-13Google Scholar
  4. 4.
    Assaf, M.H., Arima; Das, S.R., Hernias, W., Petriu, E.M.: Verification of ethernet IP core MAC design using deterministic test methodology. In: IEEE International Instrumentation and Mesurements Technology Conference, victoria, May 2008. doi: 10.1109/IMTC.2008.4547312
  5. 5.
    Tonfat, J., Reis, R.: Design and verification of a layer-2 ethernet MAC classification engine for a gGigabit ethernet switch. In: Proceedings of IEEE Electronics, Circuits, and Systems, Athens, Dec 2010. doi: 10.1109/ICECS.2010.5724475
  6. 6.
    Frazier, H.: The 802.3z gigabit ethernet standard. In: Proceedings of IEEE Journal, vol. 12, May–June 1998. doi:10.1109/65.690946Google Scholar
  7. 7.
    Lau, M.V., Shieh, S., Wang, P.-F., Smith, B., Lee, D., Chao, J., Shung, B., Shih, C.-C.: Gigabit ethernet switches using a shared buffer architecture. Communications Magazine, IEEE, 41(12), 76–84 (2003)Google Scholar
  8. 8.
    Bergeron, J.: Writing Test Benches using SystemVerilog. Springer, ISBN-10: 0-387-29221-7, Business Media (2006)Google Scholar
  9. 9.
  10. 10.

Copyright information

© Springer India 2016

Authors and Affiliations

  • Sridevi Chitti
    • 1
  • P. Chandrasekhar
    • 1
  • M. Asharani
    • 1
  • G. Krishnamurthy
    • 1
  1. 1.Department of Electronics and Communication EngineeringSRITWWarangalIndia

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