An Efficient On-Chip Implementation of Reconfigurable Continuous Time Sigma Delta ADC for Digital Beamforming Applications

  • Anjani Harsha Vardhini Palagiri
  • Madhavi Latha Makkena
  • Krishna Reddy Chantigari
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 381)

Abstract

SONAR and RADAR makes use of multiple beamforming systems. A novel Onboard Digital Beamforming (DBF) system suitable for various applications is implemented with mixed signal design of Sigma Delta ADC architecture. FPGA is configured as a Reconfigurable On-chip Sigma Delta ADC and analyzed for a multichannel beamforming system with Spartan 6, Virtex 4, and Virtex 6 FPGA. With the architectural variation, major advantages can be seen in SONAR beamforming and similar array processing applications.

Keywords

Sigma delta ADC SONAR Digital beamforming FPGA LVPECL 

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Copyright information

© Springer India 2016

Authors and Affiliations

  • Anjani Harsha Vardhini Palagiri
    • 1
  • Madhavi Latha Makkena
    • 2
  • Krishna Reddy Chantigari
    • 3
  1. 1.ECE DepartmentV.I.T.SHyderabadIndia
  2. 2.ECE DepartmentJNTUHyderabadIndia
  3. 3.Nalla Narsimha Reddy Group of InstitutionsHyderabadIndia

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