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A Comparative Study of Single Electron Threshold Logic-Based and SET-MOS Hybrid Based Half Subtractor

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Computational Advancement in Communication Circuits and Systems

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 335))

Abstract

In the present work, we have implemented a half subtractor using two different approaches, single electron threshold logic-based approach and SET-MOS hybrid approach. The logic operation of the designed circuits is tested using TSPICE and Monte–Carlo-based simulation tool SIMON. The stability of the threshold logic-based circuit is tested using the stability plots. Further we compared the performances to characterize the advantages and disadvantages of both the approaches. The proper functioning of both the circuits is successfully verified by observing the simulated output waveforms.

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Author information

Authors and Affiliations

  1. RCC Institute of Information Technology, Kolkata, 700015, India

    Arpita Ghosh

  2. Jadavpur University, Kolkata, India

    Amit Jain & Subir Kumar Sarkar

  3. Manipur Institute of Technology, Manipur University, Imphal, 795004, India

    N. Basanta Singh

Authors
  1. Arpita Ghosh
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  2. Amit Jain
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  3. N. Basanta Singh
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  4. Subir Kumar Sarkar
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Corresponding author

Correspondence to Arpita Ghosh .

Editor information

Editors and Affiliations

  1. School of Electronics & Computer Science, University of Southampton, Southampton, United Kingdom

    Koushik Maharatna

  2. Design & Growth, Institute of Materials Research & Engg, Singapore, Singapore

    Goutam Kumar Dalapati

  3. Electronics and Telecommunication Engg, Jadavpur University, Kolkata, West Bengal, India

    P K Banerjee

  4. Electronics and Electrical Communication, Indian Institute of Technology Kharagpur, Kharagpur, West Bengal, India

    Amiya Kumar Mallick

  5. Centre for Millimeter Wave Semiconductor Devices and Systems, Defence Research and Development Org., Kolkata, West Bengal, India

    Moumita Mukherjee

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Ghosh, A., Jain, A., Basanta Singh, N., Kumar Sarkar, S. (2015). A Comparative Study of Single Electron Threshold Logic-Based and SET-MOS Hybrid Based Half Subtractor. In: Maharatna, K., Dalapati, G., Banerjee, P., Mallick, A., Mukherjee, M. (eds) Computational Advancement in Communication Circuits and Systems. Lecture Notes in Electrical Engineering, vol 335. Springer, New Delhi. https://doi.org/10.1007/978-81-322-2274-3_40

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  • DOI: https://doi.org/10.1007/978-81-322-2274-3_40

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  • Publisher Name: Springer, New Delhi

  • Print ISBN: 978-81-322-2273-6

  • Online ISBN: 978-81-322-2274-3

  • eBook Packages: EngineeringEngineering (R0)

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