Advancement in Guard Zone Computation Through Detection and Exclusion of the Overlapped Regions

Abstract

The guard zone computation problem claims utmost importance in VLSI layout design, where the circuit components (or the functional units/modules or groups/blocks of different sub-circuits) that may be viewed as a set of polygonal regions on a two-dimensional plane, are not supposed to be placed much closer to each other in order to avoid electrical (parasitic) effects among them. Each (group of) circuit component(s) C _i is associated with a parameter δ _i such that a minimum clearance zone of width δ _i is to be maintained around C _i . Beyond this, it has huge significance in the field of robotic motion planning, geographical information system, automatic monitoring of metal cutting tools, and design of any embedded systems. If the guard zonal regions overlap, we have to remove the overlapped regions in order to compute the resultant outer guard zone (sometimes inner guard zones are also an issue to be considered). In this paper, we have developed an algorithm to compute the guard zone of a simple polygon as well as to exclude the overlapped regions among the guard zonal segments (if any) in O(n log n) time, where n is the number of vertices of the given simple polygon.