Implementation of 32-Point FFT Processor for OFDM System

Conference paper
Part of the Smart Innovation, Systems and Technologies book series (SIST, volume 33)


Due to the advanced VLSI technology, Fast Fourier Transform (FFT) and Inverse Fast Fourier Transform (IFFT) has been applied to wide field in wireless Communication applications. For modern communication systems, the FFT/IFFT is very important in the OFDM. Because of FFT/IFFT is the key computational block to execute the baseband multicarrier demodulation and modulation in OFDM system. An implementation of the 32-point FFT processor with radix-2 algorithm in R2MDC architecture is the processing element. This butterfly- Processing Element (PE) used in the 32-FFT processor reduces the multiplicative complexity by using real constant multiplication in one method and eliminates the multiplicative complexity by using add and shift operation in the proposed method.




  1. 1.
    Verma, P., Kaur, H., Singh, M.: VHDL implementation of FFT/IFFT blocks for OFDM. In: Proceedings of International, Conference on Advances in Recent in Communication and Computing, PI 978-1-2244-51-4-3, Kerala, pp. 186–188 (2009)Google Scholar
  2. 2.
    Jinsing, X., Xiaochun, L., Haitao, W., Yujing, B., Decai, Z., Xiaolong, Z., Chaogang, W.: Implementation of MB-OFDM transmitter baseband based on FPGA. In: 4th IEEE (ICCSC 2008), 26–28 May 2008Google Scholar
  3. 3.
    Li, W., Wanhammar, L.: Complex multiplication reduction in FFT processor. In: SSoCC’02 Falkenberg, Sweden, Mar 2002Google Scholar
  4. 4.
    Preeti, G.B., Uma Reddy N.V.: Implementation of area efficient OFDM transceiver on FPGA. Int. J. Soft Comput. Eng. 3(3), 144–147 (2013). ISSN 2231-2307 Google Scholar
  5. 5.
    Prajapati, K., Sharma, A., Thakor, H.: Implementation of an optimized 8 point FFT in pipeline architecture for FPGA’s system, vol. 1, Issue 4, (2014) Google Scholar
  6. 6.
    U.M. Baese: Digital Signal Processing with FPGA, 3rd edn. Springer, Berlin (2007)Google Scholar
  7. 7.
    Petrov, M., Glenser, M.: Optimal FFT architecture selection for OFDM receiver on FPGA. In: Proceedings of 2005 IEEE International Conference on Field Programmable technology, PI. 0-7803-9407-0, Singapore, pp. 313–314 (2005)Google Scholar
  8. 8.
    Cooley, J.W., Tukey, J.W.: An algorithm for the machine calculation of complex fourier series. Math. Comput. 19, 297–301 (1965)Google Scholar
  9. 9.
    Li, W., Wanhammar, L.: An FFT processor based on 16 point module. In: Proceedings of Norchip Conference, Stckholm, Sweden, pp. 125–130 (2001)Google Scholar
  10. 10.
    Wang, B., Zang, Q., Ao, T., Huang, M.: Design of pipelined FFT processor based on FPGA. In: Proceedings of 2nd International Conference on (ICCMS’10), pp. 432–435 (2010) Google Scholar

Copyright information

© Springer India 2015

Authors and Affiliations

  • G. Soundarya
    • 1
  • V. Jagan Naveen
    • 1
  • D. Tirumala Rao
    • 1
  1. 1.Department of ECEGMR Institute of TechnologyRajamIndia

Personalised recommendations