Abstract
Facial palsy is a form of neurological problem that results in loss of the ability to blink. At present, treatments for the ocular complications that results from facial palsy are severely lacking. Neuromuscular electrical stimulation (NMES) is found to be a better solution in restoring eyeblink. NMES is the elicitation of muscle contraction using electrical impulses. Many works are going on in designing stimulator circuits at PCB level and in some lower technologies like 600nm, 350nm etc. We propose a stimulator chip that can stimulate blink in the palsied eye in coordination with the non-palsied eye. Here, the EMG signal is first detected for blink. This blink detector block is implemented using AND logic/comparator. The output of this stage drives the output stage to deliver the required stimulating current. This output stage is implemented using charge pump to deliver the stimulation current in contrast to the controller and V/I converters used in the previous works. It is found that blink detector using dynamic AND gate consumes less power of 2.612 µW when used in stimulator chip that is used to restore blinking in paralyzed eyelid. This paper is implemented in 180nm technology using Cadence Virtuoso.
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Joselyn Priyadarshini, J., Ravindrakumar, S. (2015). Design of Low-Power Blink Detector for Minimally Invasive Implantable Stimulator (SoC) Using 180 nm Technology. In: Suresh, L., Dash, S., Panigrahi, B. (eds) Artificial Intelligence and Evolutionary Algorithms in Engineering Systems. Advances in Intelligent Systems and Computing, vol 324. Springer, New Delhi. https://doi.org/10.1007/978-81-322-2126-5_64
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DOI: https://doi.org/10.1007/978-81-322-2126-5_64
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