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A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel pp 1–29Cite as

Introduction

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Abstract

In this chapter an overview of phase lock loop is presented, starting with a short review of the history of the PLL in Sect. 1.2. In the following section, Sect. 1.3, various applications of a PLL are discussed. In Sect. 1.4, we discuss the implementation of PLL in communication centric applications. The continued progress in increasing performance, speed, reliability, and the simultaneous reduction in size and cost of integrated circuits (LSI and VLSI) has resulted in a strong interest in the implementation of the phase-locked loop (PLL) in the digital domain. In Sect. 1.5, we give a brief review of the digital version of PLL. Finally, the chapter ends with a note on the organization of this monograph.

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Authors and Affiliations

  1. Department of Physics, Indian Institute of Technology Guwahati, Guwahati, Assam, India

    Basab Bijoy Purkayastha

  2. Department of Electronics and Communication Technology, Gauhati University, Guwahati, Assam, India

    Kandarpa Kumar Sarma

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  1. Basab Bijoy Purkayastha
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Purkayastha, B.B., Sarma, K.K. (2015). Introduction. In: A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel. Signals and Communication Technology. Springer, New Delhi. https://doi.org/10.1007/978-81-322-2041-1_1

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  • DOI: https://doi.org/10.1007/978-81-322-2041-1_1

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