Efficient VLSI Implementation of CORDIC-Based Direct Digital Synthesizer

  • Prasad N. 
  • Manas Ranjan Tripathy
  • Ansuman DiptiSankar Das
  • Nihar Ranjan Behera
  • Ayaskanta Swain
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 308)


This paper presents efficient VLSI implementation of a direct digital synthesizer (DDS). Coordinate rotation digital computer (CORDIC) architecture is used in realizing the phase-to-amplitude converter (PAC) block in the proposed design. The proposed synthesizer has a frequency control word (FCW) that can select up to three different values for the phase increment. The proposed design is realized in Xilinx Virtex II Pro FPGA development board and is tested for its functionality using ChipScope Pro. The proposed design is mapped on to several families of Xilinx FPGAs for comparing the performance. Proposed synthesizer is also implemented using ASIC design flow. In the reported design, quadrature outputs can be obtained simultaneously.


CORDIC Direct digital synthesizer FPGA Xilinx ASIC 



This work is done as a part of master’s thesis of the first author. Authors thank the VLSI Laboratory of NIT Rourkela for providing with the necessary tools and kits.


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Copyright information

© Springer India 2015

Authors and Affiliations

  • Prasad N. 
    • 1
  • Manas Ranjan Tripathy
    • 2
  • Ansuman DiptiSankar Das
    • 3
  • Nihar Ranjan Behera
    • 4
  • Ayaskanta Swain
    • 5
  1. 1.Department of E & ECEIndian Institute of TechnologyKharagpurIndia
  2. 2.Department of Electronics and Communication Engineering, ITERSOA UniversityBhubaneswarIndia
  3. 3.IBM India Private LtdHyderabadIndia
  4. 4.Proxim WirelessHyderabadIndia
  5. 5.Department of ECENational Institute of TechnologyRourkelaIndia

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