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An Analytical Surface Potential Model of Surrounding Gate Tunnel FET

  • Soumen Paul
  • Angsuman Sarkar
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 308)

Abstract

In this paper, for the first time a new propitious surface potential model of tunnel field effect transistor (TFET) is presented. TFET uses band-to-band tunneling (BTBT) process and has a wide perspective in the field of nano-scale device suspending MOSFET as a switching device. The sub-threshold swing limitation of conventional MOSFET is minified by using TFET, thus establishing its own pathway and representing itself as an unprecedented device for low power application. In order to incorporate the advantages of both surrounding gate structure combined with TFET, an analytical model of surrounding gate TFET is presented. The surface potential model is developed using Gauss’s law of Electrostatics and implemented on a cylindrical structure. Performance of the device is tested for variation using high gate dielectrics and also by altering gate oxide thickness of surrounding gate TFET channel and silicon body thickness.

Keywords

BTBT Gated p-i-n diode Pseudo-2D Surrounding gate TFET Surface potential 

References

  1. 1.
    Appenzeller, J., Lin, Y.-M., Knoch, J., Avouris, P.: Band-to-band tunneling in carbon nanotube field-effect transistors. Phys. Rev. Lett. 93(19), 196805-1–196805-4 (2004)Google Scholar
  2. 2.
    Choi, W.Y., Park, B.-G., Lee, J.D., King, T.-J.K.: Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mV/dec. IEEE Trans. Electron Devices 28(8), 743–745 (2007)CrossRefGoogle Scholar
  3. 3.
    Bardon, M.G., Neves, H.P., Puers, R., Van Hoof, C.: Pseudo-Two-dimensional model for double-gate tunnel FETs considering the junctions depletion regions. IEEE Trans. Electron Devices 57(4), 827–434 (2010)Google Scholar
  4. 4.
    Mallik, A., Chattopadhyay, A.: Drain-dependence of tunnel field-effect transistor characteristics: the role of the channel. IEEE Trans. Electron Devices 58(12), 4250–4257 (2011)Google Scholar
  5. 5.
    Boucart, K., Ionescu, A.M.: Double-gate tunnel FET with high-k gate dielectric. IEEE Trans. Electron Devices 54(7), 4–12 (2007)Google Scholar
  6. 6.
    Toh, E.-H., Wang, G.H., Samudra, G., Yeo, Y.-C.: Device physics and design of double-gate tunneling field-effect transistor by silicon-film thickness optimization. Appl. Phys. Lett. 90(26), 263507 (2007)Google Scholar
  7. 7.
    Gupta, P.S., Kanungo, S., Rahaman, H., Sinha, K., Dasgupta, P.S.: An extremely low sub-threshold swing UTB SOI tunnel-FET structure suitable for low-power applications. Int. J. Appl. Phys. Math. 2(4), 240–243 (2012)Google Scholar
  8. 8.
    Sarkar, A., De, S., Dey, A., Sarkar, C.K.: A new analytical subthreshold model of SRG MOSFET with analogue performance investigation. Int. J. Electron. 99(2), 267–283 (2012)Google Scholar

Copyright information

© Springer India 2015

Authors and Affiliations

  1. 1.ECE DepartmentKalyani Government Engineering CollegeKalyaniIndia

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