MOS Fabrication Technology

  • Ajit PalEmail author


This chapter is concerned with the fabrication of metal–oxide–semiconductor (MOS) technology. Various processes such as wafer fabrication, oxidation, mask generation, photolithography, diffusion, deposition, etc. involved in the fabrication of MOS devices are introduced. Various steps used in the n-type MOS (nMOS) and complementary MOS (CMOS) fabrication are highlighted. The latch-up problem, an inherent problem of CMOS circuits, is introduced and appropriate techniques to overcome this problem are explained. Various short-channel effects arising out of the shrinking size of MOS devices are discussed. Some emerging MOS technologies such as high-K and FinFET to overcome short channel and other drawbacks are introduced.


Wafer fabrication Oxidation Mask generation Photolithography Diffusion Ion implantation Deposition Fabrication steps p-Well process n-Well process Twin-tub process Silicon on insulator Mask generation Latch-up problem Guard ring Short-channel effect High-K dielectric Lightly doped drain structure FinFET 


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Copyright information

© Springer India 2015

Authors and Affiliations

  1. 1.Computer Science and EngineeringIndian Institute of Technology KharagpurKharagpurIndia

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