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Online Testable Conservative Adder Design in Quantum Dot Cellular Automata

Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 298)

Abstract

Garbage count minimization and low power, lossless conservative full adder design and its online testing in Quantum dot Cellular Automata is prime research interest of this work. Parity preserving reversible logic design as well as conservative logic design is a lossless paradigm in Nanotechnology. Errors can be detected by means of parity in conservative logic design. We introduce a conservative logic gate to design full adder with zero garbage count. The proposed two conservative logic gate (PCLG) is universal in nature. A tester reversible logic gate (TRLG) is designed to perform online test of proposed conservative logic gate (PCLG). We demonstrate the most promising two PCLG and a TRLG to design full adder and to online test of PCLG respectively. We compared our PCLG with well-known Fredkin gate in terms of implementation of thirteen standard functions.

Keywords

Parity preserving Conservative logic gate Reversible logic gate 5—input majority voter Online testing 

References

  1. 1.
    Landauer R (1961) Irreversibility and heat generation in the computing process. IBM J Res Dev 5(3):183–191CrossRefMATHMathSciNetGoogle Scholar
  2. 2.
    Bennett CH (1973) Logical reversibility of computation. IBM J Res Dev 17(6):525–532CrossRefMATHGoogle Scholar
  3. 3.
    Das K, De D (2010) Characterization, test and logic synthesis of novel conservative and reversible logic gates for Qca. Int J Nanosci 9(03):201–214CrossRefGoogle Scholar
  4. 4.
    Das K, De D (2010) Novel approach to design a testable conservative logic gate for QCA implementation. In: 2010 IEEE 2nd international advance computing conference (IACC). IEEEGoogle Scholar
  5. 5.
    Feynman R (1985) Quantum mechanical computers. Opt News 11:11CrossRefGoogle Scholar
  6. 6.
    Toffoli T (1980) Reversible computing. Tech Memo MIT/LCS/TM-151, MIT Lab for Computer ScienceGoogle Scholar
  7. 7.
    Fredkin E, Toffoli T (2002) Conservative logic. Collision-based computing, vol. 1 Springer, London pp 47–81Google Scholar
  8. 8.
    Lent CS et al (1993) Quantum cellular automata. Nanotechnology 4(1):49CrossRefGoogle Scholar
  9. 9.
    Lent CS, Tougaw PD, Porod W (1993) Bistable saturation in coupled quantum dots for quantum cellular automata. Appl Phys Lett 62:7–14CrossRefGoogle Scholar
  10. 10.
    Vasudevan A, Dilip P et al (2006) Reversible-logic design with online testability. In: IEEE transactions on instrumentation and measurement 55.2Google Scholar
  11. 11.
    Sen B, Ganeriwal S, Sikdar BK (2013) Reversible logic-based fault-tolerant nanocircuits in QCA. ISRN Electronics 2013Google Scholar
  12. 12.
    Das K, De D (2011) A study on diverse nanostructure for implementing logic gate design for QCA. Int J Nanosci 10(01n02):263–269CrossRefGoogle Scholar
  13. 13.
    Das K, De D (2009) A novel approach of and-or-inverter (AOI) gate design for QCA. In: 2009 4th international conference on computers and devices for communication (CODEC 2009). IEEEGoogle Scholar
  14. 14.
    Lent CS, Taugaw PD, Porod W, Bernstein GH (1993) Quantum dot cellular automata. Nanotechnology 4:49–57CrossRefGoogle Scholar
  15. 15.
    Tougaw PD, Lent CS (1996) Dynamic behavior of quantum cellular automata. J Appl Phys 80(8):4722–4736CrossRefGoogle Scholar
  16. 16.
    Das K, De D (2011) Characterisation, applicability and defect analysis for tiles nanostructure of quantum dot cellular automata. Mol Simul 37(03):210–225CrossRefGoogle Scholar
  17. 17.
    Thapliyal H, Ranganathan N (2010) Reversible logic based concurrent error detection methodology for emerging nanocircuits. In: 2010 10th IEEE conference on nanotechnology (IEEE-NANO). IEEEGoogle Scholar
  18. 18.
    Parhami B (2006) Fault-tolerant reversible circuits. In: 2006 Fortieth Asilomar conference on signals, systems and computers (ACSSC’06). IEEEGoogle Scholar
  19. 19.
    Haghparast M, Navi K (2008) A novel fault tolerant reversible gate for nanotechnology based systems. Am J Appl Sci 5(5):519CrossRefGoogle Scholar
  20. 20.
    Fredkin E, Toffoli T (1982) Conservative logic. Int J Theor Phys 21:219–253Google Scholar
  21. 21.
    Ma X et al (2006) Testing reversible 1D arrays for molecular QCA. In: 2006 21st IEEE international symposium on defect and fault tolerance in VLSI systems (DFT’06). IEEEGoogle Scholar
  22. 22.
    Walus K (2002) ATIPS laboratory QCADesigner homepage. ATIPS Laboratory, University of Calgary, CanadaGoogle Scholar
  23. 23.
    Tougaw D, Khatun M (2013) A scalable signal distribution network for quantum-dot cellular automata, pp 1–1Google Scholar

Copyright information

© Springer India 2014

Authors and Affiliations

  1. 1.B. P. Poddar Institute of Management and TechnologyKolIndia
  2. 2.Department of Computer Science and EngineeringWest Bengal University of TechnologyKolkataIndia
  3. 3.School of PhysicsUniversity of Western AustraliaCrawley, PerthAustralia
  4. 4.Department of Engineering and Technological StudiesKalyani UniversityKalyaniIndia

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