Synthesis of ESOP-Based Reversible Logic Using Positive Polarity Reed-Muller Form

Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 298)

Abstract

The development of efficient techniques for reversible quantum circuit synthesis has received significant attention now-a-days due to recent emphasis on low power circuit design. This work presents two new deterministic methods which evaluate the PPRM structure of logic functions. After extracting the structure, the synthesis of ESOP based reversible logic is performed using PPRM form. The first approach is based on transformation technique, whereas the second method is based on iterative reduction procedure. In both the approaches, we have derived the PPRM expression from an input truth table. Based on this expression, the design of ESOP-based reversible circuit is achieved.

Keywords

ESOP Quantum cost Gate count Reversible circuit Cube list 

References

  1. 1.
    Landauer R (1961) Irreversibility and heat generation in the computing process. IBM Res Dev 5:183–191CrossRefMATHMathSciNetGoogle Scholar
  2. 2.
    Keyes RW, Landauer R (1970) Minimal energy dissipation in logic. IBM J Res Dev 152–157Google Scholar
  3. 3.
    Moore GE (1965) Cramming more components onto integrated circuits. Electronics 38(8)Google Scholar
  4. 4.
    Bennett CH (1973) Logical reversibility of computation. IBM J Res Dev 17:525–532CrossRefMATHGoogle Scholar
  5. 5.
    Toffoli T (1980) Reversible computing. In: Technical Memo-MIT/LCS/TM-151, MIT Lab for Computer ScienceGoogle Scholar
  6. 6.
    Perkowski M (1996) A unified approach to EXOR-based representation of Boolean functions. In: Proceedings of the XIX national conference circuit theory and electronics circuits, vol 1, Krynica, Poland, pp 27–41Google Scholar
  7. 7.
    Sasao T (1995) Representation of logic functions using EXOR operators. In: Proceedings of workshop applications of the Read-Muller expansion in circuit design, Makuhari, Japan, pp 308–313Google Scholar
  8. 8.
    Khan MMHA, Alam MS (1997) Algorithms for conversion of minterms to positive polarity Reed-Muller coefficients and vice versa. Inf Process Lett 62(5):223–230CrossRefMathSciNetGoogle Scholar
  9. 9.
    Purwar S (1991) An efficient method of computing generalized Reed-Muller expansions from binary decision diagram. IEEE Trans Comput 40(11):1298–1301CrossRefGoogle Scholar
  10. 10.
    Zhang YZ, Rayner PJW (1984) Minimization of Reed-Muller polynomials with fixed polarity. LEE Proc Comput Digit Tech 131(5):177–186Google Scholar
  11. 11.
    Harking B (1990) Efficient algorithm for canonical Reed-Muller expansion of Boolean function. IEE Proc Comput Digit Tech 137(5):366–377CrossRefGoogle Scholar
  12. 12.
    Saluja KK, Ong EH (1979) Minimization of Reed-Muller canonic expansion. IEEE Trans Comput 28:535–537Google Scholar
  13. 13.
    Besslich PhW (1983) Efficient computer method for EXOR logic design. IEE Proc Comput Digit Tech 130(6):203–206CrossRefGoogle Scholar
  14. 14.
    Habib MK (1992) Efficient algorithm for Reed-Muller expansions of completely and incompletely specified functions. In: Proceedings of the international symposium on logic synthesis and microprocessor architectureGoogle Scholar
  15. 15.
    Falkowski BJ, Chang CH (1995) An exact minimizer of fixed polarity Reed-Muller expansion. Int J Electron 79(3):389–409CrossRefGoogle Scholar
  16. 16.
    Falkowski BJ, Chang CH (2000) Minimisation of k variable mixed-polarity Reed-Muller expansions. VLSI Des 11(4):311–320CrossRefGoogle Scholar
  17. 17.
    Bandyopadhyay C, Roy D, Kole DK, Dutta K, Rahaman H (2013) ESOP-based synthesis of reversible circuit using improved cube list. In: International symposium on electronic system designGoogle Scholar
  18. 18.
    Fazel K, Thornton M, Rice JE (2007) ESOP-based Toffoli gate cascade generation. In: PACRIM, Victoria, BC, Canada, 22–24 Aug 2007. IEEE Press, pp 206–209Google Scholar
  19. 19.
    Wille R, Grosse D, Teuver L, Dueck GW, Drechsler R (2008) Revlib: an online resources for reversible functions and reversible circuits. In: 38th international symposium on multiple-valued logic, vol 24, May 2008, pp 220–225Google Scholar

Copyright information

© Springer India 2014

Authors and Affiliations

  1. 1.Bengal Engineering and Science UniversityShibpur, HowrahIndia

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