Realization of Bi-Quinary Coded Decimal Adder in Quantum Dot Cellular Automata
Bi-quinary coded parallel adder design with Quantum Cellular Automata is presented in this brief contribution. The nano-electronic computer architecture using QCA technology is in infancy stage. It requires more advancement with new approaches. In this paper the design of parallel decimal adder is proposed using bi-quinary encoding techniques with algorithm. The circuits are implemented using QCA designer tool and analyzed using simulation result. The signal propagation delay, complexity, required area, hardware cost are calculated and compare with previously proposed decimal QCA adders.
KeywordsQCA basic 3 × 3 tile Decimal digit encoding Bi-quinary code Parallel decimal adder
The authors are grateful to the University Grants Commission (UGC), India File No.: 41-631/2012(SR), under which this paper has been completed.
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