Abstract
In multi-process embedded system, optimizing the design of hardware and software reliability is fairly hard. In this paper, hardware replication and software re-execution techniques are combined to tolerate transient faults. It helps to reduce the usage of space and time in terms of embedded system design with minimal resource. The probability of information about embedded systems reliability is analyzed using System Fault Tree (SFT). SFT analyzer integrates SFT into an optimization process. An optimization algorithm which is used in this paper is known as Multi-Objective Differential Evolution (MODE), which makes effective design space exploration. It is also used to map the fault-tolerance policy information into chromosomes. The experimental result shows the achievement of maximum reliability in spatial redundancy using minimal resource and minimal fault tolerance.
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Raja, M.V., Srivatsan, R. (2013). Reliable Design of Embedded System with Minimal Resource Using SFT and Mode Algorithm. In: Malathi, R., Krishnan, J. (eds) Recent Advancements in System Modelling Applications. Lecture Notes in Electrical Engineering, vol 188. Springer, India. https://doi.org/10.1007/978-81-322-1035-1_43
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DOI: https://doi.org/10.1007/978-81-322-1035-1_43
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