Hardware Overhead vs. Performance of Matrix Multiplication on FPGA

  • Ju Seong Lee
  • Sang Don Kim
  • Yeong Seob Jeong
  • Seung Eun Lee
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 222)

Abstract

Matrix multiplication requires a large number of operations, demanding for high performance computing. In order to complete the matrix multiplication in one clock cycle, a designer can utilize multiple multipliers. However, this approach is inefficient in terms of hardware area and power consumption. Therefore, it is important to find out the way to complete the multiplication that is fast and uses hardware resources properly. In this paper, we introduce the way to reduce the number of multipliers and provide the hardware overhead and performance of matrix multiplication on FPGA.

Keywords

Matrix multiplication Digital signal processing Low-power design FPGA 

Notes

Acknowledgments

This study was supported by Seoul National University of Science and Technology, Korea.

References

  1. 1.
    Strassen V (1969) Gaussian elimination is not optimal. Numer Math 13:354–356MathSciNetMATHCrossRefGoogle Scholar
  2. 2.
    Choi J (1997) A fast scalable universal matrix multiplication algorithm on distributed-memory concurrent computers. In: Proceedings of the 11th international symposium on parallel processingGoogle Scholar
  3. 3.
    Bensaali F, Amira A, Bouridane A (2005) Accelerating matrix product on reconfigurable hardware for image processing applications, circuits, devices and systems. In: IEEE Proceedings 3 June 2005Google Scholar
  4. 4.
    Lin CY (2011) A model for matrix multiplication performance on FPGAs. In: 21st international conference on field programmable logic and applicationsGoogle Scholar
  5. 5.
    Al-Qadi Z, Aqel M (2009) Performance analysis of parallel matrix multiplication algorithms used in image processing. World Appl Sci JGoogle Scholar

Copyright information

© Springer India 2013

Authors and Affiliations

  • Ju Seong Lee
    • 1
  • Sang Don Kim
    • 1
  • Yeong Seob Jeong
    • 1
  • Seung Eun Lee
    • 1
  1. 1.Department of Electronic IT Media EngineeringSeoul National University of Science and TechnologySeoulKorea

Personalised recommendations