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Compact Models for Vertical Bipolar Transistors

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Compact Transistor Modelling for Circuit Design

Part of the book series: Computational Microelectronics ((COMPUTATIONAL))

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Abstract

In chapter 3 we discussed the most relevant phenomena of bipolar device physics. In this chapter we will give a precise description of the model equations which together define a given model. This description will be limited to vertical npn transistors for integrated circuits, including the substrate effects of the parasitic pnp transistor. Vertical pnp transistors also exist, but they require no new fundamental additions.

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© 1990 Springer-Verlag/Wien

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de Graaff, H.C., Klaassen, F.M. (1990). Compact Models for Vertical Bipolar Transistors. In: Compact Transistor Modelling for Circuit Design. Computational Microelectronics. Springer, Vienna. https://doi.org/10.1007/978-3-7091-9043-2_4

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  • DOI: https://doi.org/10.1007/978-3-7091-9043-2_4

  • Publisher Name: Springer, Vienna

  • Print ISBN: 978-3-7091-9045-6

  • Online ISBN: 978-3-7091-9043-2

  • eBook Packages: Springer Book Archive

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