Skip to main content
Book cover

Nanotechnologie und Nanoprozesse pp 243–256Cite as

Erweiterung konventioneller Bauelemente durch Nanotechniken

  • 3350 Accesses

Zusammenfassung

Die Reduktion der Dimensionen in elektronischen Bauelementen führt einerseits zu leistungsfähigeren Transistoren, bewirkt andererseits aber auch statistische Fluktuationen in den Transistorparametern wie der Schwellenspannung oder der Steilheit. Zusätzlich treten bei tiefen Temperaturen neue Effekte auf, die noch nicht vollständig erklärt werden können. Die Auswirkung der Nanoskalierung auf Transistoren wird anhand gemessener Transistorparameter und Kennlinien diskutiert.

This is a preview of subscription content, access via your institution.

Chapter
USD   29.95
Price excludes VAT (USA)
  • DOI: 10.1007/978-3-662-48908-6_8
  • Chapter length: 14 pages
  • Instant PDF download
  • Readable on all devices
  • Own it forever
  • Exclusive offer for individuals only
  • Tax calculation will be finalised during checkout
eBook
USD   89.00
Price excludes VAT (USA)
  • ISBN: 978-3-662-48908-6
  • Instant PDF download
  • Readable on all devices
  • Own it forever
  • Exclusive offer for individuals only
  • Tax calculation will be finalised during checkout
Hardcover Book
USD   119.99
Price excludes VAT (USA)
Learn about institutional subscriptions
Abb. 8.1
Abb. 8.2
Abb. 8.3
Abb. 8.4
Abb. 8.5
Abb. 8.6
Abb. 8.7
Abb. 8.8
Abb. 8.9
Abb. 8.10

Literatur

  1. http://www.itrs.net/ITRS%201999-2014%20Mtgs,%20Presentations%20&%20Links/2013ITRS/2013TableSummaries/2013ORTC_SummaryTable.pdf. Zugegriffen im September.2015

  2. Xu Q, Qian H, Yin H, Jia L, Ji H, Chen B, Zhu Y, Liu M, Han Z, Hu H, Qiu Y, Wu D (2001) The investigation of key technologies for Sub-0.1 μm CMOS device fabrication. IEEE Trans Electron Devices 48:1412–1420

    CrossRef  Google Scholar 

  3. Wann C, Assaderaghi F, Shi L, Chan K, Cohen S, Hovel H, Jenkins K, Le Y, Sadana D, Viswanathan R, Wind S, Taur Y (1997) High-performance 0,07-μm CMOS with 9.5-ps gate delay and 150 GHz fT. IEEE Electron Device Lett 18:625–627

    CrossRef  Google Scholar 

  4. Iwai H, Momose HS (1998) Ultra-thin gate oxides-performance and reliability. In: IEDM 1998 proceedings, S 163–166

    Google Scholar 

  5. Johnson RW, Hultqvist A, Bent SF (2014) A brief review of atomic layer deposition: from fundamentals to applications. Mater Today 17(5):236–246

    CrossRef  Google Scholar 

  6. Leskelä M, Ritala M (2002) Atomic layer deposition (ALD): from precursors to thin film structures. Thin Solid Films 409:138–146

    CrossRef  Google Scholar 

  7. Ono M, Saito M, Yoshitomi T, Fiegna C, Ohguro T, Iwai H (1995) A 40 nm gate length n-MOSFET. IEEE Trans Electron Devices 42:1822–1830

    CrossRef  Google Scholar 

  8. Taur Y, Mil YJ, Frank DJ, Wong HS, Buchanan DA, Wind SJ, Rishton SA, Sai-Halasz GA, Nowak EJ (1995) CMOS scaling into the 21st century: 0.1 μm and beyond. IBM J Res Dev 39:24

    CrossRef  Google Scholar 

  9. Mikolajick T, Ryssel H (1993) Influence of statistical dopant fluctuations on MOS transistors with deep submicron channel lengths. Microelectron Eng 21:419

    CrossRef  Google Scholar 

  10. Mikolajick T, Ryssel H (1996) Der Einfluß statistischer Dotierungsschwankungen auf die minimale Kanallänge von Kurzkanal-MOS-Transistoren, ITG-Fachbericht 138: Mikroelektronik für die Informationstechnik, S 183. ISBN 3-8007-2171-6

    Google Scholar 

  11. Horstmann J, Hilleringmann U, Goser K (1998) Matching analysis of deposition defined 50 nm MOSFETs. IEEE Trans Electron Devices 45:299

    CrossRef  Google Scholar 

  12. Lakshmikumar KR, Hadaway RA, Copeland MA (1986) Characterization and modeling of mismatch in MOS transistors for precision analog design. IEEE J Solid-State Circuits SC-21:1057

    CrossRef  Google Scholar 

  13. Stolk PA, Schmitz J (1997) Fluctuations in submicron CMOS transistors. In: Proceedings of the second workshop on innovative circuits and systems for nano electronics, Delft, 29–30.09.1997, S 21–24

    Google Scholar 

  14. Wong HS, Taur Y (1993) Three-dimensional „atomistic“ simulation of discrete random dopant distribution effects in sub-0.1 μm MOSFET’s IEDM’93. In: Proceedings, digest technical papers, 05.–08.12, S 705

    Google Scholar 

  15. Asenov A (1998) Random dopant threshold voltage fluctuations in 50 nm epitaxial channel MOSFETs: a 3D ‚atomistic‘ simulation study. In: ESSDERC’98, 08–10.09.1998, Bordeaux, S 300–303

    Google Scholar 

  16. Skotnicki T (1996) Advanced architectures for 0.18–0.12 μm CMOS generations. In: Proceedings of the 26th European solid state device research conference ESSDERC’96, Bologna, 09–11.09.1996, S 505–514

    Google Scholar 

  17. Hellberg PE, Zhang SL, Petersson CS (1997) Work function of boron-doped polycrystalline SixGe1-x films. IEEE Electron Device Lett 18:456

    CrossRef  Google Scholar 

  18. Wirth G (1999) Mesoscopic phenomena in nanometer scale MOS devices. Dissertation, Faculty of Electrical Engineering. University of Dortmund, Germany

    Google Scholar 

  19. Wirth G, Hilleringmann U, Horstmann JT, Goser KF (1999) Mesoscopic transport phenomena in ultrashort channel MOSFETs. Solid-State Electron 43:1245

    CrossRef  Google Scholar 

  20. Wirth G, Hilleringmann U, Horstmann JT, Goser K (1999) Negative differential resistance in ultrashort bulk MOSFETs. In: Proceedings of the 25th annual conference of the IEEE industrial electronics society IECON’99, San Jose, 29.11–03.12.1999, S 29. ISBN 0-7803-5735-3

    Google Scholar 

  21. Behammer D (1996) Niedertemperaturtechnologie zur Herstellung von skalierfähigen Si/SiGe/Si-Heterobipolartransistoren. Dissertation, University of Bochum

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Universität Paderborn, Paderborn, Deutschland

    Ulrich Hilleringmann

  2. Technische Universität Chemnitz, Chemnitz, Deutschland

    John T. Horstmann

Authors
  1. Ulrich Hilleringmann
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. John T. Horstmann
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Ulrich Hilleringmann .

Editor information

Editors and Affiliations

  1. Hagen, Germany

    Prof. Dr. Wolfgang Fahrner

Rights and permissions

Reprints and Permissions

Copyright information

© 2017 Springer-Verlag GmbH Deutschland

About this chapter

Cite this chapter

Hilleringmann, U., Horstmann, J.T. (2017). Erweiterung konventioneller Bauelemente durch Nanotechniken. In: Fahrner, W. (eds) Nanotechnologie und Nanoprozesse. Springer Vieweg, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-48908-6_8

Download citation