Abstract
As people puts forward more requirements for high-definition video industry, capture, transcoding, storage and display of high-definition video then become progressively imperative. This paper presents a parallel video SoC system for faster and flexible 1080P video processing. The key elements of this system, including parallel RGB to YUV transcoder, two-level pipeline and high speed memory controller, are elaborated. 0.028 um CMOS technology node is applied for implementing the SoC architecture. It is competitive in providing high quality images and is proved to be well supportive for DVI and HDMI signal.
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Gao, J., Zou, X., Zhang, Y., Tao, F. (2016). The Research of High-Definition Video Processing System Based on SOC. In: Jia, Y., Du, J., Li, H., Zhang, W. (eds) Proceedings of the 2015 Chinese Intelligent Systems Conference. Lecture Notes in Electrical Engineering. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-48386-2_17
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DOI: https://doi.org/10.1007/978-3-662-48386-2_17
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