Design of Reversible Adder-Subtractor and its Mapping in Optical Computing Domain

Part of the Lecture Notes in Computer Science book series (LNCS, volume 8911)


Reversible logic has promising applications in dissipation less optical computing, low power computing, quantum computing, etc. Reversible circuits do not lose information, and there is a one-to-one mapping between the input and the output vectors. In recent years, researchers have implemented reversible logic gates in optical domain as it provides high-speed and low-energy computations. Reversible gates can be easily fabricated at the chip level using optical computing. The optical implementation of reversible logic gates are based on semiconductor optical amplifier (SOA)-based Mach-Zehnder interferometer (MZI). The Mach-Zehnder interferometer has advantages such as high speed, low power, easy fabrication, and fast switching time. In this work, we present the optical implementation of an n bit reversible ripple carry adder. The optical reversible adder design is based on two new optical reversible gates referred to as optical reversible gate I (ORG-I) and optical reversible gate II (ORG-II) and the existing optical Feynman gate. The two new reversible gates ORG-I and ORG-II are proposed as they can implement a reversible adder with reduced optical cost which is the measure of number of MZIs switches and the propagation delay, and with zero overhead in terms of the number of ancilla inputs and the garbage outputs. The proposed optical reversible adder design based on the ORG-I and ORG-II reversible gates are compared and shown to be better than the other existing designs of reversible adder proposed in non-optical domain in terms of the number of MZIs, delay, the number of ancilla inputs, and the garbage outputs. A subtraction operation can be defined as \(a-b=\overline{\bar{a}+b}\) and \(a-b=a+\bar{b}+1\), respectively. Next, we propose the design methodologies based on (i) \(a-b=\overline{\bar{a}+b}\), and (ii) \(a-b=a+\bar{b}+1\), to design a reversible adder-subtractor that is controlled by the control signal to perform addition or subtraction operation.


Memory Location Semiconductor Optical Amplifier Reversible Logic CNOT Gate Optical Cost 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    Al-Zayed, A., Cherri, A.: Improved all-optical modified signed-digit adders using semiconductor optical amplifier and mach-zehnder interferometer. Opt. Laser Technol. 42(5), 810–818 (2010)CrossRefGoogle Scholar
  2. 2.
    Banerjee, A., Pathak, A.: Optically implementable designs of reversible sequential devices. Indian J. Phys. 84, 1063–1068 (2010)CrossRefGoogle Scholar
  3. 3.
    Chattopadhyay, T.: All-optical modified fredkin gate. IEEE J. Sel. Top. Quantum Electron. PP(99), 1–8 (2011)Google Scholar
  4. 4.
    Cherri, A.K., Al-Zayed, A.S.: Circuit designs of ultra-fast all-optical modified signed-digit adders using semiconductor optical amplifier and mach-zehnder interferometer. Opt. Int. J. Light Electron Opt. 121(17), 1577–1585 (2010)CrossRefGoogle Scholar
  5. 5.
    Cuccaro, S.A., Draper, T.G., Kutin, S.A., Moulton, D.P.: A new quantum ripple-carry addition circuit, Oct 2004.
  6. 6.
    Frank, M.: Approaching the physical limits of computing. In: Proceedings of ISMVL 2005, The Thirty-Fifth International Symposium on Multiple-Valued Logic, Calgary, Canada, pp. 168–185, May 2005Google Scholar
  7. 7.
    Fredkin, E., Toffoli, T.: Conservative logic. Int. J. Theor. Phys. 21, 219–253 (1982)CrossRefzbMATHMathSciNetGoogle Scholar
  8. 8.
    Huang, Y., Kumar, P.: Interaction-free quantum optical fredkin gates in \(\chi ^{(2)}\) microdisks. IEEE J. Sel. Top. Quantum Electron. PP(99), 1–12 (2011)Google Scholar
  9. 9.
    Huang, Y., Kumar, P.: Fredkin gates in \(\chi (2)\) microdisks via quantum zeno blockade. In: Nonlinear Optics: Materials, Fundamentals and Applications, p. NWE1. Optical Society of America (2011)Google Scholar
  10. 10.
    Kostinski, N., Fok, M.P., Prucnal, P.R.: Experimental demonstration of an all-optical fiber-based fredkin gate. Opt. Lett. 34(18), 2766–2768 (2009)CrossRefGoogle Scholar
  11. 11.
    Kotiyal, S.: Design Methodologies For Reversible Logic Based Barrel Shifters. Master’s thesis, Univ. of South Florida, Tampa (2012).
  12. 12.
    Kotiyal, S., Thapliyal, H., Ranganathan, N.: Mach-zehnder interferometer based design of all optical reversible binary adder. In: Design, Automation Test in Europe Conference Exhibition (DATE), 2012, pp. 721–726, March 2012Google Scholar
  13. 13.
    Kotiyal, S., Thapliyal, H., Ranganathan, N.: Circuit for reversible quantum multiplier based on binary tree optimizing ancilla and garbage bits. In: 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, pp. 545–550, Jan 2014Google Scholar
  14. 14.
    Kotiyal, S., Thapliyal, H., Ranganathan, N.: Efficient reversible NOR gates and their mapping in optical computing domain. Microelectron. J. 45(6), 825–834 (2014)CrossRefGoogle Scholar
  15. 15.
    Chang, L., Frank, D.J., Montoye, R.K., Koester, S.J., Ji, B.L., Coteus, P.W., Dennard, R.H., Haensch, W.: Practical strategies for power-efficient computing technologies. Proc. IEEE 98(2), 215–236 (2010)CrossRefGoogle Scholar
  16. 16.
    Maity, G.K., Roy, J.N., Maity, S.P.: Mach-zehnder interferometer based all-optical peres gate. In: Abraham, A., Mauri, J.L., Buford, J.F., Suzuki, J., Thampi, S.M. (eds.) ACC 2011, Part III. CCIS, vol. 192, pp. 249–258. Springer, Heidelberg (2011)CrossRefGoogle Scholar
  17. 17.
    Maity, G., Chattopadhyay, T., Roy, J., Maity, S.: All-optical reversible multiplexer. In: 4th International Conference on Computers and Devices for Communication, 2009, CODEC 2009, pp. 1–3, Dec 2009Google Scholar
  18. 18.
    Thomsen, M.K., Glück, R., Axelsen, H.B.: Reversible arithmetic logic unit for quantum arithmetic. J. Phys. A: Math. Theor. 43(38), 2002 (2010)CrossRefGoogle Scholar
  19. 19.
    Nielsen, M.A., Chuang, I.L.: Quantum Computation and Quantum Information. Cambridge University Press, New York (2000)zbMATHGoogle Scholar
  20. 20.
    Parhami, B.: Fault-tolerant reversible circuits. In: Proceedings of 40th Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, pp. 1726–1729, Nov 2006Google Scholar
  21. 21.
    Taraphdara, C., Chattopadhyay, T., Roy, J.: Mach-zehnder interferometer-based all-optical reversible logic gate. Opt. Laser Technol. 42(2), 249–259 (2010)CrossRefGoogle Scholar
  22. 22.
    Thapliyal, H.: Design, Synthesis and Test of Reversible Logic Circuits for Emerging Nanotechnologies. Ph.D. thesis, Univ. of South Florida, Tampa (2011).
  23. 23.
    Thapliyal, H., Ranganathan, N.: A new reversible design of BCD adder. In: Design, Automation Test in Europe Conference Exhibition (DATE), 2011, pp. 1–4, March 2011Google Scholar
  24. 24.
    Thapliyal, H., Ranganathan, N., Kotiyal, S.: Reversible logic based design and test of field coupled nanocomputing circuits. In: Anderson, N.G., Bhanja, S. (eds.) Field-Coupled Nanocomputing. LNCS, vol. 8280, pp. 133–172. Springer, Heidelberg (2014)CrossRefGoogle Scholar
  25. 25.
    Ma, X., Huang, J., Metra, C., Lombardi, F.: Reversible gates and testability of one dimensional arrays of molecular QCA. J. Elect. Test. 24(1–3), 1244–1245 (2008)Google Scholar
  26. 26.
    Ma, X., Huang, J., Metra, C., Lombardi, F.: Detecting multiple faults in one-dimensional arrays of reversible QCA gates. J. Elect. Test. 25(1), 39–54 (2009)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2014

Authors and Affiliations

  1. 1.Department of Computer Science and EngineeringUniversity of South FloridaTampaUSA
  2. 2.Department of Electrical and Computer EngineeringUniversity of KentuckyLexingtonUSA

Personalised recommendations