Summary
The purpose of this paper is to present the proposal of a partitioning scheme as a method for modelling complex digital hardware systems. This proposal is aiming at the use of uniform descriptional tools for as many levels as possible within the hierarchy of languages in an implementation of a hardware/software system. And it is aiming at the use of a uniform functional partitioning scheme in modelling each of the implementation layers. This paper is an attempt of a contribution for bridging the educational gap between the fields of software engineering and hardware engineering. The first part of this paper deals with the description of the model and its application to modelling existing systems for pedagogic purposes. In the final part of this paper a guideline for architectural designs derived from the model, is discussed.
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Hartenstein, R. (1973). Hierarchy of Interpreters for Modelling Complex Digital Systems. In: Brauer, W. (eds) GI Gesellschaft für Informatik e. V.. Lecture Notes in Computer Science, vol 1. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-41148-3_28
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DOI: https://doi.org/10.1007/978-3-662-41148-3_28
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