Abstract
For many years, research has focused on parallel data processing micros,ystems (Fig. 3.12) in order to enhance the computational power. Therefore, the following discourse discusses to what extent the future nanoelectronic devices are suitable for highly parallel systems. In this context, known architectural concepts have to be checked or modified. This check is necessary, since the new nanoelectronic devices show qualitatively new properties in terms of their physical dimensions, power dissipation, gain, number of stable states, clock frequency, and above all integration level. The integration level is expected to increase from hundreds of million to hundreds of billion devices.
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© 2004 Springer-Verlag Berlin Heidelberg
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Goser, K., Glösekötter, P., Dienstuhl, J. (2004). Parallel Architectures for Nanosystems. In: Nanoelectronics and Nanosystems. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-05421-5_6
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DOI: https://doi.org/10.1007/978-3-662-05421-5_6
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-40443-9
Online ISBN: 978-3-662-05421-5
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