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Verification of Embedded Real-time Systems

  • Paula HerberEmail author
  • Sabine Glesner
Chapter

Abstract

Real-time systems are systems where the correctness does not only depend on their correct functioning but also on meeting realtime constraints. Such systems are often deployed in safety-critical applications, for example in airplanes, trains, or automotive systems. There, a failure may result in enormous costs or even in human injuries or loss of lifes. As a consequence, systematic verification and validation of real-time systems is a crucial issue.

The main application area for real-time systems are embedded applications, where the system controls technical processes that also evolve in real-time. Such systems are usually composed of deeply integrated hardware and software components, and they are developed under severe resource limitations and high quality requirements. In connection with the steadily increasing demands on multi-functioning and flexibility, analog control components are more and more replaced by complex digital HW/SW systems.

A major challenge is to develop automated quality assurance techniques that can be used for the verification and validation of complex embedded real-time systems that consist of both hardware and software. In this chapter, we give an overview over our research contributions to this topic. In particular, we present our framework for the verification of safety and timing properties of digital embedded real-time systems, which are modeled in SystemC, using timed automata and the UPPAAL model checker.

Keywords

Model Check Conformance Test Time Automaton Brake Pressure Clock Valuation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Alur, R., Dill, D.L.: A Theory of Timed Automata. Theoretical Computer ScienceGoogle Scholar
  2. 2.
    126, 183-235 (1994)Google Scholar
  3. 3.
    ARM Ltd.: AMBA3 AHB-Lite Protocol Specification (2006)Google Scholar
  4. 4.
    Behjati, R., Sabouri, H., Razavi, N., Sirjani, M.: An effective approach for model checking systemc designs. In: Application of Concurrency to System Design (ACSD). pp. 56–61 (2008)Google Scholar
  5. 5.
    Behrmann, G., David, A., Larsen, K.G.: A Tutorial on UPPAAL. In: Formal Methods for the Design of Real-Time Systems. pp. 200-236. LNCS 3185, Springer (2004)Google Scholar
  6. 6.
    Bengtsson, J., Yi, W.: Timed automata: Semantics, algorithms and tools. In: Lecture Notes on Concurrency and Petri Nets. pp. 87-124. LNCS 3098, Springer (2004)Google Scholar
  7. 7.
    Berthomieu, B., Diaz, M.: Modeling and verification of time dependent systems using time petri nets. IEEE Transactions on Software Engineering 17(3) (1991)Google Scholar
  8. 8.
    Berthomieu, B., Ribet, P.O., Vernadat, F.: The tool tina construction of abstract state spaces for petri nets and time petri nets. International Journal of Production Research 42(14), 2741–2756 (2004)zbMATHCrossRefGoogle Scholar
  9. 9.
    Blanc, N., Kroening, D., Sharygina, N.: Scoot: A Tool for the Analysis of SystemC Models. In: International Conference on Tools and Algorithms for Construction and Analysis of Systems (TACAS). LNCS, vol. 4963, pp. 467–470. Springer (2008)Google Scholar
  10. 10.
    Bruschi, F., Ferrandi, F., Sciuto, D.: A framework for the functional verification of SystemC models. Int. Journal on Parallel Programming 33(6), 667–695 (2005)zbMATHCrossRefGoogle Scholar
  11. 11.
    Chen, M., Mishra, P., Kalita, D.: Towards RTL test generation from SystemC TLM specifications. In: IEEE International High Level Design Validation and Test Workshop. pp. 91–96. IEEE Computer Society (2007)Google Scholar
  12. 12.
    Cimatti, A., Micheli, A., Narasamdya, I., Roveri, M.: Verifying SystemC: A software model checking approach. In: Formal Methods in Computer-Aided Design (FMCAD), 2010. pp. 51–59. IEEE (2010)Google Scholar
  13. 13.
    Cimatti, A., Griggio, A., Micheli, A., Narasamdya, I., Roveri, M.: Kratos – A Software Model Checker for SystemC. In: Computer Aided Verification, LNCS, vol. 6806, pp. 310–316. Springer (2011)Google Scholar
  14. 14.
    Cimatti, A., Narasamdya, I., Roveri, M.: Software model checking systemc. IEEE Trans. on CAD of Integrated Circuits and Systems 32(5), 774–787 (2013)CrossRefGoogle Scholar
  15. 15.
    FZI Research Center for Information Technology: KaSCPar – Karlsruhe SystemC Parser SuiteGoogle Scholar
  16. 16.
    Garavel, H., Helmstetter, C., Ponsini, O., Serwe, W.: Verification of an industrial SystemC/TLM model using LOTOS and CADP. In: Formal Methods and Models for Co-Design (MEMOCODE). pp. 46–55. IEEE (2009)Google Scholar
  17. 17.
    Gibson-Robinson, T., Armstrong, P., Boulgakov, A., Roscoe, A.: Fdr3 a modern refinement checker for csp. In: Tools and Algorithms for the Construction and Analysis of Systems, LNCS, vol. 8413, pp. 187–201. Springer (2014)Google Scholar
  18. 18.
    Groetker, T.: System Design with SystemC. Kluwer Academic Publishers (2002)Google Scholar
  19. 19.
    Große, D., Drechsler, R.: Checkers for SystemC designs. In: Formal Methods and Models for Codesign. pp. 171–178. IEEE Computer Society (2004)Google Scholar
  20. 20.
    Große, D., Kühne, U., Drechsler, R.: HW/SW Co-Verification of Embedded Systems using Bounded Model Checking. In: Great Lakes Symposium on VLSI. pp. 43–48. ACM Press (2006)Google Scholar
  21. 21.
    Große, D., Peraza, H., Klingauf, W., Drechsler, R.: Embedded Systems Specification and Design Languages, chap. Measuring the Quality of a SystemC Testbench by Using Code Coverage Techniques, pp. 73–86. Springer (2008)Google Scholar
  22. 22.
    Habibi, A., Moinudeen, H., Tahar, S.: Generating Finite State Machines from Sys- temC. In: Design, Automation and Test in Europe. pp. 76–81. IEEE (2006)Google Scholar
  23. 23.
    Habibi, A., Tahar, S.: An Approach for the Verification of SystemC Designs Using AsmL. In: Automated Technology for Verification and Analysis. pp. 69-83. LNCS 3707, Springer (2005)Google Scholar
  24. 24.
    Hansel, J., Rose, D., Herber, P., Glesner, S.: An evolutionary algorithm for the generation of timed test traces for embedded real-time systems. In: Intl. Conf. on Software Testing, Verification and Validation (ICST). pp. 170–179. IEEE (2011)Google Scholar
  25. 25.
    Herber, P., Fellmuth, J., Glesner, S.: Model Checking SystemC Designs Using Timed Automata. In: International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS). pp. 131–136. ACM press (2008)Google Scholar
  26. 26.
    Herber, P., Friedemann, F., Glesner, S.: Combining Model Checking and Testing in a Continuous HW/SW Co-Verification Process. In: Tests and Proofs. LNCS, vol. 5668. Springer (2009)Google Scholar
  27. 27.
    Herber, P., Glesner, S.: A HW/SW Co-Verification Framework for SystemC. ACM Transactions on Embedded Computing Systems (2013)Google Scholar
  28. 28.
    Herber, P., Pockrandt, M., Glesner, S.: Automated Conformance Evaluation of SystemC Designs using Timed Automata. In: IEEE European Test Symposium (2010)Google Scholar
  29. 29.
    Herber, P., Pockrandt, M., Glesner, S.: Transforming SystemC Transaction Level Models into UPPAAL Timed Automata. In: Formal Methods and Models for Codesign (MEMOCODE). pp. 161–170. IEEE Computer Society (2011)Google Scholar
  30. 30.
    Hessel, A., Larsen, K.G., Mikucionis, M., Nielsen, B., Pettersson, P., Skou, A.: Formal Methods and Testing, chap. Testing Real-Time Systems Using UPPAAL. Springer (2008)Google Scholar
  31. 31.
    Hessel, A., Larsen, K.G., Nielsen, B., Petterson, P., Skou, A.: Time-optimal test cases for real-time systems. In: Proceedings of the 3rd International Workshop on Formal Approaches to Testing of Software (FATES). pp. 114-130. LNCS 2931, Springer (2003)Google Scholar
  32. 32.
    IEEE Standards Association: IEEE Std. 1666-2011, Open SystemC Language Reference Manual (2011)Google Scholar
  33. 33.
    Jaghoori, M.M., Movaghar, A., Sirjani, M.: Modere: The Model-checking Engine of Rebeca. In: ACM Symposium on Applied Computing. pp. 1810-1815. SAC ’06, ACM (2006)Google Scholar
  34. 34.
    Junior, A.D., Cecilio da Silva, D.J.: Code-coverage Based Test Vector Generation for SystemC Designs. In: IEEE Computer Society Annual Symposium on VLSI. pp. 198–206. IEEE (2007)Google Scholar
  35. 35.
    Kalaji, A.S., Hierons, R.M., Swift, S.: Generating Feasible Transition Paths for Testing from an Extended Finite State Machine (EFSM). In: Intl. Conf. on Software Testing Verification and Validation. pp. 230–239. IEEE (2009)Google Scholar
  36. 36.
    Karlsson, D., Eles, P., Peng, Z.: Formal verification of SystemC Designs using a Petri-Net based Representation. In: Design, Automation and Test in Europe (DATE). pp. 1228–1233. IEEE Press (2006)Google Scholar
  37. 37.
    Kirchsteiger, C.M., Trummer, C., Steger, C., Weiss, R., Pistauer, M.: Distributed Embedded Systems: Design, Middleware and Resources, chap. Specification-based Verification of Embedded Systems by Automated Test Case Generation, pp. 35–44. Springer (2008)Google Scholar
  38. 38.
    Krichen, M., Tripakis, S.: Real-time testing with timed automata testers and coverage criteria. In: Joint conference on Formal Modelling and Analysis of Timed Systems and Formal Techniques in Real-Time and Fault Tolerant System (FORMATS- FTRTFT). pp. 134-151. LNCS 3253, Springer (2004)Google Scholar
  39. 39.
    Kroening, D., Sharygina, N.: Formal Verification of SystemC by Automatic Hard- ware/Software Partitioning. In: MEMOCODE. pp. 101–110. IEEE (2005)Google Scholar
  40. 40.
    Larsen, K.G., Mikucionis, M., Nielsen, B.: Formal Approaches to Software Testing, chap. Online Testing of Real-time Systems Using UPPAAL, pp. 79–94. Springer (2005)Google Scholar
  41. 41.
    Le, H.M., Große, D., Herdt, V., Drechsler, R.: Verifying SystemC using an intermediate verification language and symbolic simulation. In: DAC. p. 116 (2013)Google Scholar
  42. 42.
    Lefticaru, R., Ipate, F.: Automatic State-based Test Generation using Genetic Algorithms. In: International Symposium on Symbolic and Numeric Algorithms for Scientific Computing. pp. 188–195. IEEE Computer Society (2007)Google Scholar
  43. 43.
    Man, K.L.: An Overview of SystemCFL. In: Research in Microelectronics and Electronics. vol. 1, pp. 145–148 (2005)Google Scholar
  44. 44.
    Mathaikutty, D.A., Ahuja, S., Dingankar, A., Shukla, S.: Model-driven test generation for system level validation. In: IEEE International High Level Design Validation and Test Workshop. pp. 83–90. IEEE Computer Society (2007)Google Scholar
  45. 45.
    Müller, W., Ruf, J., Rosenstiel, W.: SystemC: Methodologies and Applications, chap. An ASM based SystemC Simulation Semantics, pp. 97–126. Kluwer Academic Publishers (2003)Google Scholar
  46. 46.
    Nielsen, B., Skou, A.: Automated test generation from timed automata. In: International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS). pp. 343-357. LNCS 2031, Springer (2001)Google Scholar
  47. 47.
    Patel, H.D., Shukla, S.K.: Model-driven validation of SystemC designs. EURASIP Journal on Embedded Systems 2008(3), 1–14 (2008)Google Scholar
  48. 48.
    Pockrandt, M., Herber, P., Glesner, S.: Model Checking a SystemC/TLM Design of the AMBA AHB Protocol. In: IEEE/ACM Symposium on Embedded Systems For Real-time Multimedia (ESTIMedia). pp. 66–75. IEEE Computer Society (2011)Google Scholar
  49. 49.
    Pockrandt, M., Herber, P., Klüs, V., Glesner, S.: Model Checking Memory-Related Properties of Hardware/Software Co-Designs. In: Embedded Systems: Design, Analysis and Verification. Proceedings of the International Embedded Systems Symposium (IESS). Springer (2013)Google Scholar
  50. 50.
    Razavi, N., Behjati, R., Sabouri, H., Khamespanah, E., Shali, A., Sirjani, M.: Sys- fier: Actor-based formal verification of SystemC. ACM Trans. Embedded Comput. Syst. 10(2), 19 (2010)CrossRefGoogle Scholar
  51. 51.
    Ruf, J., Hoffmann, D.W., Gerlach, J., Kropf, T., Rosenstiel, W., Müller, W.: The Simulation Semantics of SystemC. In: Design, Automation and Test in Europe. pp. 64–70. IEEE Press (2001)Google Scholar
  52. 52.
    Schneider, S.: Concurrent and Real Time Systems: The CSP Approach. John Wiley & Sons, Inc. (1999)Google Scholar
  53. 53.
    da Silva, K.R.G., Melcher, E.U.K., Araujo, G., Pimenta, V.A.: An automatic testbench generation tool for a SystemC functional verification methodology. In: Symposium on Integrated circuits and system design. pp. 66–70. ACM Press (2004)Google Scholar
  54. 54.
    SystemC Verification Working Group – SCV: SystemC Verification Standard (2006)Google Scholar
  55. 55.
    Tracey, N.J.: A Search-based Automated Test-Data Generation Framework for Safety-Critical Software. Ph.D. thesis, University of York (2000)Google Scholar
  56. 56.
    Traulsen, C., Cornet, J., Moy, M., Maraninchi:, F.: A SystemC/TLM semantics in Promela and its possible applications. In: 14th Workshop on Model Checking Software (SPIN ’07). pp. 204-222. LNCS 4595, Springer (2007)Google Scholar
  57. 57.
    Veanes, M., Campbell, C., Grieskamp, W., Schulte, W., Tillmann, N., Nachmanson, L.: Model-Based Testing of Object-Oriented Reactive Systems with Spec Explorer. In: Formal Methods and Testing, LNCS, vol. 4949, pp. 39–76. Springer (2008)Google Scholar
  58. 58.
    de Vries, R.G., Tretmans, J.: On-the-fly conformance testing using SPIN. Software Tools for Technology Transfer 2(4), 382–393 (2000)Google Scholar
  59. 59.
    Wegener, J., Buhr, K., Pohlheim, H.: Automatic Test Data Generation For Structural Testing Of Embedded Software Systems By Evolutionary Testing. In: Proceedings of the Genetic and Evolutionary Computation Conference. pp. 1233–1240. Morgan Kaufmann Publishers Inc. (2002)Google Scholar

Copyright information

© Springer Fachmedien Wiesbaden 2015

Authors and Affiliations

  1. 1.University of PotsdamPotsdamGermany

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