I.P. Hierarchical Systems: Architectural Features

  • V. Cantoni
Part of the NATO ASI Series book series (volume 25)


In this paper the nature of image understanding tasks is outlined and the network computer, multicomputer, and multiprocessor systems based on a hierarchical structure, which have been developed for these tasks, are reviewed.

Finally, the architectural features of the PAPIA machine are presented in details together with the applications that we are developing on this system.


Multigrid Method Local Operation Computational Structure PAPIA Machine Elementary Processor 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. [1]
    P. Reeves, “Parallel Computer Architectures for Image Processing”, Computer Vision, Graphics, and Image Processing 25, 68–84 (1984).CrossRefGoogle Scholar
  2. [2]
    H. J. Siegel, “PASM: A Reconfigurable Multi-Minicomputer System for Image Processing”, in Languages and Architectures for IP, M. J. Duff and S. Levialdi Eds, Academic Press, New York, 257–266 (1981).Google Scholar
  3. [3]
    S. L. Tanimoto, “A Hierarchical Cellular Logic for Pyramid Computers”, Journal of Parallel and Distributed Computing 1, 105–132 (1984).CrossRefGoogle Scholar
  4. [4]
    V. Cantoni, M. Ferretti, S. Levialdi, and F. Maloberti, “A Pyramid Project Using Integrated Technology”, in Integrated Tecnology for Parallel Image Processing, S. Levialdi Ed., Academic Press, London, 121–132 (1985).Google Scholar
  5. [5]
    D. H. Schaefer, G. C. Wilcox and V. J. Harris, “A pyramid of MPP processing elements — experiences and plans”, Proc. 18th Annual Hawaii International Conference on System Science, Vol. 1, 178–184 (1985).Google Scholar
  6. [6]
    F. Devos, A. Merigot, and B. Zavidovique, “Integration d’un processeur cellulaire pour une architecture pyramidale de traitement d’image”, Revue Phys. Appl. 20, 23–27 (1985).CrossRefGoogle Scholar
  7. [7]
    L. Uhr, J. Lackey, and L. Thompson, “A 2-layered SIMD/MIMD Parallel Pyramidal ‘Array/Net’”, Proc. Work. on Computer Architecture for Pattern Analysis and Image Data Base Management, IEEE Computer Society Press, 209–216 (1981).Google Scholar
  8. [8]
    G. Fritsch, “Memory-Coup1ed Processor Arrays for a Broad Spectrum of Application”, Lecture Notes in Physics, Springer-Verlag, 158–177 (1984).Google Scholar
  9. [9]
    V. Cantoni, M. Ferretti, S. Levialdi, and R. Stefanelli, “PAP IA: Pyramidal Architecture for Parallel Image Analysis”, Proc. 7th Symp. on Computer Arithmetic, Urbana IL, 237–242 (1985).Google Scholar
  10. [10]
    V. Cantoni, “A Pyramid machine for Image Analysis”, Proc. SPIE B596 Conf. on Architectures amp; Algorithms for Digital Image Analysis, Cannes, (1985). In Press.Google Scholar
  11. [11]
    V. Cantoni and S. Levialdi, “PAPIA: a case history”, in Massivelу Parallel Hierarchical Pyramid Multi-Computer For Perception, L. Uhr Ed, Academic Press, (1986).Google Scholar
  12. [12]
    D. Gannon, “On the Structure of Parallelism in highly Concurrent PDE Solver”, Proc. 7th Symp. on Computer Arithmetic, Urbana IL, 252–259 (1985).Google Scholar
  13. [13]
    C. Hewitt and H. Lieberman, “Design Issues in Parallel Architectures for Artificial Intelligence”, A.I. Memo No. 750 (1983).Google Scholar
  14. [14]
    L. Carrioli, “A Pyramidal Haar Transform Implementation”, in Image Analysis and Processing, V. Cantoni, S. Levialdi and G. Musso Eds, Plenum, (1986), in press.Google Scholar
  15. [15]
    V. Cantoni, L. Carrioli, “Structural shape recognition in multiresolution environment”, submitted to Signal Processing.Google Scholar
  16. [16]
    V. Cantoni, S. Levialdi, “Contour Labelling by Pyramidal Processing”, in Intermediate level image processing, M. J. Duff Ed, Academic Press, 179–188 (1986).Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1986

Authors and Affiliations

  • V. Cantoni
    • 1
  1. 1.Dipartimento di Informatica e SistemisticaUniversita’ di PaviaPaviaItaly

Personalised recommendations