Advertisement

The PASM System and Parallel Image Processing

  • Howard Jay Siegel
Conference paper
Part of the NATO ASI Series book series (volume 18)

Abstract

One way to do image processing faster is through the use of parallelism. Different modes of parallelism can be employed in a computer system. The SIMD (single instruction stream — multiple data stream) mode [9] typically uses a set of N processors, N memories, an interconnection network, and a control unit (e.g., Illiac IV [6], STARAN [5], CLIP4 [8], MPP [16]). The control unit broadcasts instructions to the processors and all active (“enabled”) processors execute the same instruction at the same time. Each processor executes instructions using data taken from a memory with which only it is associated. The interconnection network allows interprocessor communication. An MSIMD (multiple-SIMD) system is a parallel processing system which can be structured as one or more independent SIMD machines (e g., MAP [13]). The Illiac IV was originally designed as an MSIMD system [3]. The MIMD (multiple instruction stream — multiple data stream) mode [9] typically consists of N processors and N memories, where each processor can follow an independent instruction stream (e.g., C.mmp [27], Cm* [25]). As with SIMD architectures, there is a multiple data stream and an interconnection network. A partitionable SIMD/MIMD system is a parallel processing system which can be structured as one or more independent SIMD and/or MIMD machines (e.g., TRAC [17]).

Keywords

Virtual Machine Interconnection Network Memory Module Physical Address Multiple Data Stream 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. [1]
    G. B. Adams III and H. J. Siegel, “The extra stage cube: A fault-tolerant interconnection network for supersystems,” IEEE Trans. Computers, Vol. C-31, May 1982, pp. 443–454.CrossRefGoogle Scholar
  2. [2]
    R. Aronld and E. Page, “A hierarchical, restructurable multimicroprocessor architecture,” 3rd Symp. Computer Architecture, Jan. 1976, pp. 40–45.Google Scholar
  3. [3]
    G. Barnes, et al., “The Illiac IV computer,” IEEE Trans. Computers, Vol. C-17, Aug. 1968, pp. 746–757.CrossRefGoogle Scholar
  4. [4]
    K. E. Batcher, “The flip network in STARAN,” 1976 Int’l. Conf. Parallel Processing, Aug. 1976, pp. 65–71.Google Scholar
  5. [5]
    K. E. Batcher, “STARAN series E,” 1977 Int’l. Conf. Parallel Processing, Aug. 1977, pp. 144–153.Google Scholar
  6. [6]
    W. J. Bouknight, et al., “The Illiac IV system,” Proc. IEEE, Vol. 60, Apr. 1972, pp. 369–388.CrossRefGoogle Scholar
  7. [7]
    B. A. Crane, et al., “PEPE computer architecture,” COMPCON 1972, Sept. 1972, pp. 57–60.Google Scholar
  8. [8]
    M. J. B. Duff, “Architectures of SIMD cellular logic image processing arrays,” this volume.Google Scholar
  9. [9]
    M. J. Flynn, “Very high-speed computing systems,” Proc. IEEE, Vol. 54, Dec. 1966, pp. 1901–1909.CrossRefGoogle Scholar
  10. [10]
    L. R. Goke and G. J. Lipovski, “Banyan networks for partitioning multimicroprocessor systems,” 1st Symp. Computer Architecture, Dec. 1973, pp. 21–28.Google Scholar
  11. [11]
    S. I. Kartashev and S. P. Kartashev, “A multicomputer system with dynamic architecture,” IEEE Trans. Computers, Vol. C-28, Oct. 1979, pp. 704–720.CrossRefGoogle Scholar
  12. [12]
    D. H. Lawrie, “Access and alignment of data in an array processor,” IEEE Trans. Computers, Vol. C-24, Dec. 1975, pp. 1145–1155.CrossRefMathSciNetGoogle Scholar
  13. [13]
    G. J. Nutt, “Microprocessor implementation of a parallel processor,” 4th Symp. Computer Architecture, Mar. 1977, pp. 147–152.Google Scholar
  14. [14]
    J. H. Patel, “Performance of processor-memory interconnections for multiprocessors,” IEEE Trans. Computers, Vol. C-30, Oct. 1981, pp. 771–780.CrossRefGoogle Scholar
  15. [15]
    M. C. Pease, III, “The indirect binary n-cube microprocessor array,” IEEE Trans. Computers, Vol. C-26, May 1977, pp. 458–473.CrossRefGoogle Scholar
  16. [16]
    J. L. Potter, “MPP architecture and programming,” in Multicomputers and Image Processing: Algorithms and Programs, K. Preston and L. Uhr, eds., Academic Press, New York, NY, 1982, pp. 275–290.Google Scholar
  17. [17]
    M. C. Sejnowski, E. T. Upchurch, R. N. Kapur, D. P. S. Charlu, and G. J. Lipovski, “An overview of the Texas Reconfigurable Array Computer, ” AFIPS 1980 Nat’l. Computer Conf., June 1980, pp. 631–641.Google Scholar
  18. [18]
    H. J. Siegel and R. J. McMillen, “Using the augmented data manipulator network in PASM,” Computer, Vol. 14, Feb. 1981, pp. 25–33.CrossRefGoogle Scholar
  19. [19]
    H. J. Siegel and R. J. McMillen, “The multistage cube: a versatile interconnection network,” Computer, Vol. 14, Dec. 1981, pp. 65–76.CrossRefGoogle Scholar
  20. [20]
    H. J. Siegel, L. J. Siegel, F. C. Kemmerer, P. T. Mueller, Jr., H. E. Smalley, and S. D. Smith, “PASM: a partitionable SIMD/MIMD system for image processing and pattern recognition,” IEEE Trans. Computers, Vol. C-30, Dec. 1981, pp. 934–947.CrossRefGoogle Scholar
  21. [21]
    H. J. Siegel, “Analysis techniques for SIMD machine interconnection networks and the effects of processor address masks,” IEEE Trans. Computers, Vol. C-26, Feb. 1977, pp. 153–161.CrossRefGoogle Scholar
  22. [22]
    H. J. Siegel, “A model of SIMD machines and a comparison of various interconnection networks,” IEEE Trans. Computers, Vol. C-28, Dec. 1979, pp. 907–917.CrossRefGoogle Scholar
  23. [23]
    L. J. Siegel, P. T. Mueller, Jr., and H. J. Siegel, “FFT algorithms for SIMD machines,” 17th Allerton Conf. Communication, Control, and Computing, Oct. 1979, pp. 1006–1015.Google Scholar
  24. [24]
    H. S. Stone, “Parallel computers,” in Introduction to Computer Architecture, 2nd edition, edited by H. S. Stone, Science Research Associates, Inc., Chicago, IL, 1980, pp. 363–425.Google Scholar
  25. [25]
    R. J. Swan, S. H. Fuller, and D. P. Siewiorek, “Cm*: a modular, multi-microprocessor,” Nat’l. Computer Conf., June 1977, pp. 637–644.Google Scholar
  26. [26]
    C. L. Wu and T. Y. Feng, “On a class of multistage interconnection networks,” IEEE Trans. Computers, Vol. C-29, Aug. 1980, pp. 694–702.CrossRefMathSciNetGoogle Scholar
  27. [27]
    W. A. Wulf and C. G. Bell, “C.mmpa multi-miniprocessor,” Fall Joint Computer Conf., Dec. 1972, pp. 765–777.Google Scholar

Further reading about PASM

  1. H. J. Siegel, P. T. Mueller, Jr., and H. E. Smalley, Jr., “Control of a partitionable multimicroprocessor system,” 1978 Int’l. Conf. Parallel Processing, Aug. 1978, pp. 9–17.Google Scholar
  2. H. J. Siegel, L. J. Siegel, F. C. Kemmerer, P. T. Mueller, Jr., H. E. Smalley, and S. D. Smith, “PASM: a partitionable SIMD/MIMD system for image processing and pattern recognition,” IEEE Trans. Computers, Vol. C-30, Dec. 1981, pp. 934–947.CrossRefGoogle Scholar
  3. H. J. Siegel, F. Kemmerer, and M. Washburn, “Parallel memory system for a partitionable SIMD/MIMD machine,” 1979 Int’l. Conf. Parallel Processing, Aug. 1979, pp. 212–221.Google Scholar
  4. J. T. Kuehn, H. J. Siegel, and M. Grosz, “A distributed memory management system for PASM,” IEEE Comp. Soc. Workshop Computer Architecture for Pattern Analysis and Image Database Management, Oct. 1983.Google Scholar
  5. R. J. McMillen and H. J. Siegel, “The hybrid cube network,” Distributed Data Acquisition, Computing, and Control Symp., Dec. 1980, pp. 11–22.Google Scholar
  6. R. J. McMillen, G. B. Adams III, and H. J. Siegel, “Performance and implementation of 4x4 switching nodes in an interconnection network for PASM,” 1981 Int’l. Conf. Parallel Processing, Aug. 1981, pp. 229–233.Google Scholar
  7. H. J. Siegel and R. J. McMillen, “The multistage cube: a versatile interconnection network,” Computer, Vol. 14, Dec. 1981, pp. 65–76.CrossRefGoogle Scholar
  8. G. B. Adams III and H. J. Siegel, “The extra stage cube: a fault-tolerant interconnection network for supersystems,” IEEE Trans. Computers, Vol. C-31, May 1982, pp. 443–454.Google Scholar
  9. S. D. Smith, H. J Siegel, R. J. McMillen, and G. B. Adams III, “Use of the augmented data manipulator multistage network for SIMD machines,” 1980 Int’l. Conf. Parallel Processing, Aug. 1980, pp. 75–78.Google Scholar
  10. R. J. McMillen, G. B. Adams III, and H. J. Siegel, “Permuting with the augmented data manipulator network,” 18th Allerton Conf. Communication, Control, and Computing, Oct. 1980, pp. 544–553.Google Scholar
  11. H. J. Siegel and R. J. McMillen, “Using the augmented data manipulator network in PASM,” Computer, Vol. 14, Feb. 1981, pp. 25–33.CrossRefGoogle Scholar
  12. R. J. McMillen, and H. J. Siegel, “Performance and fault tolerance improvements in the inverse augemnted data manipulator network,” 9th Int’1. Symp. Computer Architecture, Apt. 1982, pp. 63–72.Google Scholar
  13. G. B. Adams III and H. J. Siegel, “On the number of permutations performable by the augmented data manipulator network,” IEEE Trans. Computers, Vol. C-31, Apr. 1982, pp. 270–277.CrossRefGoogle Scholar
  14. R. J. McMillen and H. J. Siegel, “Routing schemes for the augmented data manipulator network in an MIMD system,” IEEE Trans. Computers, Dec. 1982, pp. 63–72.Google Scholar
  15. H. J. Siegel and S. D. Smith, “Study of multistage SIMD interconnection networks,” 5th Symp. Computer Architecture, Apt. 1978, pp. 223–229.Google Scholar
  16. H. J. Siegel, “Interconnection networks for SIMD machines,” Computer, Vol. 12, June 1979, pp. 57–65.CrossRefGoogle Scholar
  17. H. J. Siegel, R. J. McMillen, and P. T. Mueller, Jr., “A survey of interconnection methods for reconfigurable parallel processing systems, ” 1979 Nat’l. Computer Conf., June 1979, pp. 529–542.Google Scholar
  18. H. J. Siegel, “The theory underlying the partitioning of permutation networks,” IEEE Trans. Computers, Vol. C-29, Sept. 1980, pp. 791–801.CrossRefGoogle Scholar
  19. R. J. McMillen and H. J. Siegel, “A comparison of cube type and data manipulator type networks,” 3rd Int’l. Conf. Distributed Computing Systems, Oct. 1982, pp. 614–621.Google Scholar
  20. H. J. Siegel, Interconnection Networks for Large-Scale Parallel Processing: Theory and Case Studies, D.C. Heath and Co., Lexington, MA, 1983.Google Scholar
  21. H. J. Siegel, L. J. Siegel, R. J. McMillen, P. T. Mueller, Jr., and S. D. Smith, “An SIMD/MIMD multimicroprocessor system for image processing and pattern recognition,” 1979 IEEE Comp. Soc. Conf. Pattern Recognition and Image Process–17747 Aug. 1979, pp. 214–224.Google Scholar
  22. D. L. Tuomenoksa and H. J. Siegel, “Application of two-dimensional bin packing algorithms for task scheduling in the PASM multimicrocomputer system,” 19th Allerton Conf. Communication, Control, and Computing, Oct. 1981, pg. 542.Google Scholar
  23. D. L. Tuomenoksa and H. J. Siegel, “Analysis of the PASM control system memory hierarchy,” 1982 Int’l. Conf. Parallel Processing, Aug. 1982, pp. 363–370.Google Scholar
  24. D. L. Tuomenoksa and H. J. Siegel, “Analysis of multiple-queue task scheduling algorithms for multiple-SIMD machines,” 3rd Int’l. Conf. Distributed Computing Systems, Oct. 1982, pp. 114–1317Google Scholar
  25. D. L. Tuomenoksa and H. J. Siegel, “Preloading schemes for the PASM parallel memory system,” 1983 Int’l. Conf. Parallel Processing, Aug. 1983, pp. 407–415.Google Scholar
  26. J. T. Kuehn and H. J. Siegel, “Simulation studies of PASM in SIMD mode, ” 1981 IEEE Comp. Soc. Workshop Computer Architecture for Pattern Analys s and Image Database Management, Nov. 1981, pp. 43–50.Google Scholar
  27. J. T. Kuehn, H. J. Siegel, and P. D. Hallenbeck, “Design and simulation of an MC68000-based multimicroprocessor system,” 1982 Int’l. Conf. Parallel Processing, Aug. 1982, pp. 353–362.Google Scholar
  28. P. T. Mueller, Jr., L. J. Siegel, and H. J. Siegel, “A parallel language for image and speech processing, ” IEEE Comp. Soc. Fourth Int’l. Computer Software and Applications Co Tf rence (TPSAC 80), Oct. 1980, pp. 476–483.Google Scholar
  29. C. Cline and H. J. Siegel, “Extensions of Ada for SIMD parallel processing,” IEEE Comp. Soc. Seventh Int’l. Computer Software and Applications Conf. (COMPSAC 83), Nov. 1983.Google Scholar
  30. L. J. Siegel, P. T. Mueller, Jr., and H. J. Siegel, “FFT algorithms for SIMD machines,” 17th Allerton Conf. Communication, Control, and Computing, Oct. 1979, pp. 1006–1015.Google Scholar
  31. P. T. Mueller, Jr., L. J. Siegel, and H. J. Siegel, “Parallel algorithms for the two-dimensional FFT,” 5th Int’l. Conf. Pattern Recognition, Dec. 1980, pp. 497–502.Google Scholar
  32. P. H. Swain, H. J. Siegel, and J. El-Achkar, “Multiprocessor implementation of image pattern recognition: a general approach,” 5th Int’l. Conf. Pattern Recognition, Dec. 1980, pp. 309–317.Google Scholar
  33. H. J. Siegel and P. H. Swain, “Contextual classification on PASM,” IEEE Comp. Soc. Conf. Pattern Recognition and Image Processing, Aug. 1981, pp. 320–325.Google Scholar
  34. T. N. Mudge, E. J. Delp, L. J. Siegel, and H. J. Siegel, “Image coding using the multimicroprocessor system PASM,” IEEE Comp. Soc. Conf. Pattern Recognition and Image Processing, June 1982, pp. 200–205.Google Scholar
  35. L. J. Siegel, H. J. Siegel, and A. E. Feather, “Parallel processing approaches to image correlation,” IEEE Trans. Computers, Vol. C-31, Mar. 1982, pp. 208–218.CrossRefGoogle Scholar
  36. L. J. Siegel, H. J. Siegel, and P. H. Swain, “Performance measures for evaluating algorithms for SIMD machines,” IEEE Trans. Software Engineering, Vol. SE-8, July 1982, pp. 319–331.CrossRefGoogle Scholar
  37. M. R. Warpenburg and L. J. Siegel, “Image resampling in an SIMD environment,” IEEE Trans. Computers, Oct. 1982, pp. 934–942.Google Scholar
  38. H. J. Siegel, P. H. Swain, and B. W. Smith, “Remote sensing on PASM and CDC Flexible Processors,” in Multicomputers and Image Processing: Algorithms and Programs, K. Preston L. Uhr, eds. Academic Press, New York, NY, 1982, pp. 331–342.Google Scholar
  39. D. L. Tuomenoksa, G. B. Adams III, H. J. Siegel, and O. R. Mitchell, “A parallel algorithm for contour extraction: advantages and architectural implications,” 1983 IEEE Comp. Soc. Symp. Computer Vision and Pattern Recognition, June 1983, pp. 336–344.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1985

Authors and Affiliations

  • Howard Jay Siegel
    • 1
  1. 1.School of Electrical EngineeringPurdeu UniversityWest LafayetteUSA

Personalised recommendations