Piezoresistive Properties of Ion Implanted Layers in Silicon
Ion implantation has previously been shown to be an excellent technique for preparing uniform, accurately doped resistive layers in silicon. In addition to the good control over doping concentration made possible by ion implantation, the magnitude and sign of the temperature coefficient of resistance (TCR) of these resistive layers can be controlled independently by the annealing temperature following implantation . In this paper we present measurements of the gage factor and the temperature coefficient of gage factor (TCGF) of ion implanted resistors in silicon.
The gage factor and TCGF of the following implanted layers in silicon have been measured: (1) lightly and heavily doped phosphorus implanted layers; (2) low temperature and room temperature boron implanted layers; (3) impurity compensated layers, doped with both boron and phosphorus. All these layers reflect the presence of deep damage centers in the silicon, the magnitude of the effect being related to the temperature of annealing. A minimum annealing cycle is required to achieve adequate junction isolation between the ion implanted layer and the substrate. A significant density of damage centers remain after all annealing cycles. These centers alter the carrier concentration under various strains and temperatures. Their effect can be additive or compensating to the gage factor of the damage-free resistor.
KeywordsGage Factor Defect Contribution Deep Defect Level Silicon Resistor Semiconductor Strain Gage
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