Neurocomputing pp 161-166 | Cite as

Parallel Implementation of a Multi-Layer Perceptron

  • F. Baiardi
  • R. Mussardo
  • R. Serra
  • G. Valastro
Conference paper
Part of the NATO ASI Series book series (volume 68)

Abstract

In this paper we describe a parallel implementation of a multi-layer perceptron for a message-passing parallel architecture following the vertical-slicing approach. A theoretical analysis shows that linear scalability may be achieved both in recognition and learning, at the expense of a proper replication of data structures in order to optimize the communication phase.

Scalability is a function of the number of neurons per processor, of the communication bandwidth and of the ratio between processing time and communication time. We show how, given a particular neural network, the number of processing elements that minimizes the execution time can be determined.

The theoretical analysis has been confirmed by an actual implementation in the case of a Transputer-based system with 40 processing nodes.

Keywords

Expense 

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References

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    Baiardi, F., Mussardo, R., Serra, R. & G. Valastro: “Feedforward Layered Networks on Message Passing Parallel Computers”, to appear in “Proceedings of the 1989 Workshop on Parallel Architectures and Neural Networks”, E.R. Caianiello editor, World Scientific Publishers, London, in pressGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1990

Authors and Affiliations

  • F. Baiardi
    • 1
  • R. Mussardo
    • 1
  • R. Serra
    • 2
  • G. Valastro
    • 2
  1. 1.Dipartimento di InformaticaUniversità di PisaPisaItalty
  2. 2.ENIDATABolognaItaly

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