Abstract
In the area of VLSI design testability analysis has become a crucial aspect. Analysis of complex designs can be resonably done only by support of appropriate tools. An advanced method for algorithmic checking the compliance of register transfer and gate level hardware descriptions with testability related design restrictions is presented. Assuming a hierarchical design process, the analysis also is done hierarchically. To increase flexibility, i. e., to handle multiple design restrictions, the particular restrictions are expressed via exchangeable rule sets controlling the analysis. The underlaying method used for analysing is symbolic execution.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Literatur
E. B. Eichelberger, T. W. Williams, A Logic Design Structure For LSI Testability, Proc. 14th Design Automation Conference, 1977, pp. 462–468
R. G. Bennetts, Design of Testable Logic Circuits, Addison-Wesley Publishers Ltd., 1984
E. Hörbst, M. Nett, H. Schwärtzel, VENUS - Entwicklung von VLSI Schaltungen, Springer-Verlag, 1986, Kap. 4
M. Gerner, W. Görke, M. Marhöfer, Prüfgerechter Entwurf von IC, Informatik-Spektrum, Band 9, Heft 4, 1986
P. Camurati, P. Prinetto, Knowledge Based, Systems for CAD, CAT, and CAR: reality or utopia, Proc. CompEuro 87, pp. 444–450
M. Bidjan-Irani, U. Glässer, F. J. Rammig, Knowledge Based Tools for Testability Checking, Proc. Fault-Tolerant Computing Systems, 1987, pp. 119–128
K. D. Bhavsar, Design for Test Calculus: An Algorithm for DFT Rule Checking, Proc. 20th Design Automation Conference, 1983, pp. 300–307
U. Glässer, Hierarchische DFT-Analyse, Diplomarbeit, Universität-GH Paderborn, FB Mathematik/Informatik, 1987
DACAPO II User-Manual, DOSIS GmbH, Dortmund, 1986
B. Hütt, U. Kastens, E. Zimmermann, GAG: A Praktical Compiler Generator, LNCS, Vol. 141, Springer-Verlag, 1982
M. R. Garey, D. S. Johnson, Computers and Intractability: A Guide to the Theory of NP-Completeness, Freeman, 1979
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1989 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Glässer, U. (1989). Ein regelbasiertes System zur Testbarkeitsanalyse hierarchisch aufgebauter Schaltungsentwürfe. In: Görke, W., Sörensen, H. (eds) Fehlertolerierende Rechensysteme / Fault-tolerant Computing Systems. Informatik-Fachberichte, vol 214. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-75002-1_27
Download citation
DOI: https://doi.org/10.1007/978-3-642-75002-1_27
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-51565-4
Online ISBN: 978-3-642-75002-1
eBook Packages: Springer Book Archive