Optimizing the Peak-Performance of Vector Units with Dynamically Allocatable Vector Registers

Abstract

The performance of a vector unit mainly depends on its start-up time and the time required for a single vector element. For vector units with a fast and limited vector memory, the achievable peak-performance is influenced by the start-up time and the vector memory size. Programming is also important to the achievable peak-performance if complicated vector expressions are evaluated. A technique known as ’strip mining’ frequently proves to be suitable. By this method, long vectors are decomposed into subvectors and the whole expression is evaluated for the current subvector before moving on to the next subvector. If many vector registers are allocated to the vector memory, the utilizable maximum vector length is considerably reduced which may have a negative influence on peak-performance. In a simple model, conditions for vector register allocation are investigated. Let M be the vector memory size, μ the ratio of the main memory access time to the vector memory access time and S the start-up time for an evaluation. A vector register should be allocated to the vector memory if the number of separate transport instructions avoidable by this allocation is greater than S/(μM). For a translation of very long expressions, a subdivision might be useful. A heuristic method is developed which subdivides long expressions into appropriate parts.