Short Introduction to VERILOG

  • Ulrich Golze


This chapter will give the reader a first overview of the hardware description language VERILOG by several small examples. Together with the extensive introduction in Chapter 11, which can be used whenever needed in parallel to the remainder of the book, and with the training simulator VeriWell on the enclosed disk, all foundations and concepts for understanding the VERILOG models of the processor TOOBSIE are presented. We assume and recommend that the reader knows at least one structured programming language like Pascal, Modula-2, or C; in particular, VERILOG is very similar to C.


Short Introduction Initial Block Parallel Block Extensive Introduction High Level Module 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1996

Authors and Affiliations

  • Ulrich Golze
    • 1
  1. 1.Department of Integrated Circuit Design (E.I.S.)Technical University of BraunschweigBraunschweigGermany

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