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MIS Structure

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Book cover Gate Dielectrics and MOS ULSIs

Part of the book series: Springer Series in Electronics and Photonics ((SSEP,volume 34))

Abstract

A MIS structure is illustrated in Fig.2.1, d being the thickness of the insulator and VG the applied voltage on the gate metal. When compared with a MIS transistor (Fig. 1.1), the MIS capacitor has only two terminals, and is the simplest and most useful device in the study of semiconductor surfaces and gate dielectrics [2.1-3]. In this chapter, we shall consider MIS theory and its applications. In most cases, a p-type semiconductor will be taken as an example, since it is employed in n-channel MOSFETs.

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Authors and Affiliations

  1. Kyoto Research Laboratory, Matsushita Electronics, Inc., 19 Nishikujo-Kasugacho, Minami-ku,Kyoto, 601, Japan

    Takashi Hori Ph.D.

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  1. Takashi Hori Ph.D.
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© 1997 Springer-Verlag Berlin Heidelberg

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Hori, T. (1997). MIS Structure. In: Gate Dielectrics and MOS ULSIs. Springer Series in Electronics and Photonics, vol 34. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-60856-8_2

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  • DOI: https://doi.org/10.1007/978-3-642-60856-8_2

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-64587-7

  • Online ISBN: 978-3-642-60856-8

  • eBook Packages: Springer Book Archive

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