Abstract
It is reasonable to attempt to improve performance of an existing computer system by incorporation of a cache or buffer memory. Furthermore, it is also reasonable to attempt to predict the effect of that inclusion by system models. This paper reports on such an effort. We begin by describing the system, devising a methodology to use a processor dedicated cache in the multi-processor system, and conclude by examining a series of modeling efforts germane to predicting the performance effects of the cache. We are interested in and conclude that very simple models can quite accurately predict such performance improvements if properly abstracted from the actual or proposed system architecture and can do so with a small expenditure of computer time and human effort.
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© 1977 Springer-Verlag Berlin · Heidelberg
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Patton, P.C., Franta, W.R., Petschauer, T.W., Pliml, R.F. (1977). On Performance Studies of Processor Oriented Cache Configurations. In: Spies, P.P. (eds) Modelle für Rechensysteme. Informatik — Fachberichte, vol 9. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-45499-8_10
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DOI: https://doi.org/10.1007/978-3-642-45499-8_10
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-08206-4
Online ISBN: 978-3-642-45499-8
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