Design and Implementation of a Novel Entirely Covered K2 CORDIC

  • Jianfeng Zhang
  • Wei Ding
  • Hengzhu Liu
Conference paper
Part of the Communications in Computer and Information Science book series (CCIS, volume 396)


The conventional Coordinate Rotation Digital Computer (CORDIC) algorithm has been widely applied in many aspects, whereas it is restricted by the convergence range of the rotation angle, which need use pre-processing and post-processing units to control the quadrant of the angle. This paper proposes a novel CORDIC architecture which covers the entire coordinate space, no further more pre-processing and post-processing modules will be required. Compared with the conventional CORDIC, the Bit Error Position (BEP) of the proposed architecture has been improved, which exceeds the conventional CORDIC 2 bits. In the mean time, both of the mean errors and the hardware overhead are reduced, and the speed accelerates 35%. The proposed k 2 CORDIC architecture has been validated on the Xilinx ML505 FPGA development platform, which has been well applied in Direct Digital Frequency Synthesizer (DDS) and Fast Fourier Transform (FFT).


Coordinate Rotation Digital Computer (CORDIC) bit error position (BEP) FPGA Direct Digital Frequency Synthesizer (DDS) Fast Fourier Transform (FFT) 


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Copyright information

© Springer-Verlag Berlin Heidelberg 2013

Authors and Affiliations

  • Jianfeng Zhang
    • 1
  • Wei Ding
    • 2
    • 1
  • Hengzhu Liu
    • 1
    • 2
  1. 1.Institute of Microelectronics and Microprocessor, School of ComputerNational University of Defense TechnologyChangshaP.R. of China
  2. 2.China Defense Science and Technology Information CenterBeijingP.R. of China

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