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End-to-End High Speed Forward Error Correction Using Graphics Processing Units

  • Md Shohidul IslamEmail author
  • Jong-Myon Kim
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 274)

Abstract

Forward error correction (FEC) is an efficient error recovery mechanism for wireless networks in which erroneous packet is corrected in the destination node. More importantly, real-time and high-speed wireless networks require fast error recovery to ensure quality of service (QoS). Since graphics processing units (GPUs) offer massively parallel computing platform, we propose a GPU-based parallel error control mechanism using extended Hamming code supporting single-bit as well as multiple-bit error correction. We compare the performance of the proposed GPU-based approach with the equivalent sequential algorithm that runs on the traditional CPU for error strength, t, such that 1 ≤ t ≤ 7. Experimental results demonstrate that the proposed GPU-based approach outperforms the sequential approach in terms of execution time. Moreover, the proposed parallel implementation yields significant reduction in computational complexity from O(n 3) of the sequential algorithm to O(n) of the GPU-based approach, leading to tremendous speedup gain.

Keywords

Real-time wireless communication multiple bit error FEC extended Hamming code GPU 

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Copyright information

© Springer-Verlag Berlin Heidelberg 2014

Authors and Affiliations

  1. 1.School of Electrical EngineeringUniversity of UlsanUlsanKorea

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