Abstract
Individual components of the communication system can be implemented in different environments on the stage of design and prototyping. Some of them are simulated in a high-level language environment, like matlab, and some are implemented in a target device, FPGA or signal processor, using evaluation boards. The verification of hardware implementation needs the communication interface sufficiently fast to transmit high amount of data. The Ethernet interface widely available on modern boards seems to be useful. The paper presents a set of modules, compiled as applications as well as implemented in FPGA, used to send data between PC and FPGA device over Ethernet omitting the TCP/IP protocol stack. The data are send and received by direct access to the Ethernet frames. Simple transmission protocol with acknowledgment was proposed to provide reliable data transmission.
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References
Davey, M.C., MacKay, D.: Low-Density Parity Check Codes over GF(q). IEEE Comunications Letters 2(6), 165–167 (1998)
Sułek, W., Dziwoki, G., Kucharczyk, M.: GF(q) LDPC decoder design for FPGA implementation. In: 10th Annual IEEE Consumer Communications and Networking Conference, Las Vegas, pp. 445–450 (2013)
Sułek, W.: Pipeline processing in low-density parity-check codes hardware decoder. Bulletin of the Polish Academy of Sciences Technical Sciences 59(2), 149–155 (2011)
Falcao, G., et al.: Shortening design time through multiplatform simulations with a portable OpenCL golden-model: the LDPC decoder case. In: 20th IEEE International Symposium on Field-Programmable Custom Computing Machines, pp. 224–231 (2012)
Xilinx Inc.: ML605 Hardware User Guide. UG534 (v1.8) (October 2012), http://www.xilinx.com/support/documentation/boards_and_kits/ug534.pdf
Xilinx Inc.: Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC – User Guide. UG368 (v1.3) (March 2011), http://www.xilinx.com/support/documentation/user_guides/ug368.pdf
IEEE Computer Society: IEEE Std 802.3-2008 – Part 3: Carrier sense multiple access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications. New York, USA (2008), http://standards.ieee.org/about/get/802/802.3.html
Sarangi, A., MacMahon, S.: LightWeight IP (lwIP) Application Examples. XAPP1026 (v3.2) (October 2012), http://www.xilinx.com/support/documentation/application_notes/xapp1026.pdf
1-CORE Technologies: Soft CPU Cores for FPGA, http://www.1-core.com/library/digital/soft-cpu-cores/
Dollas, A., Ermis, I., Koidis, I., Zisis, I., Kachris, C.: An Open TCP/IP Core for Reconfigurable Logic. In: 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, Napa, pp. 297–298 (2005)
Löfgren, A., Lodesten, L., Sjöholm, S., Hansson, H.: An analysis of FPGA-based UDP/IP stack parallelism for embedded Ethernet connectivity. In: 23rd IEEE NORCHIP Conference, 94–97. Oulu, Finland, pp. 94–97 (2005)
Alachiotis, N., Berger, S.A., Stamatakis, A.: Effcient PC-FPGA Communication over Gigabit Ethernet. In: 10th IEEE International Conference on Computer and Information Technology, Bradford, UK, pp. 1727–1734 (2010)
Riverbed Technology: WinPcap – The industry-standard windows packet capture library, http://www.winpcap.org/
Riverbed Technology: Wireshark – The world’s foremost network protocol analyzer, http://www.wireshark.org/
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Kucharczyk, M., Dziwoki, G. (2013). Simple Communication with FPGA Device over Ethernet Interface. In: Kwiecień, A., Gaj, P., Stera, P. (eds) Computer Networks. CN 2013. Communications in Computer and Information Science, vol 370. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-38865-1_30
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DOI: https://doi.org/10.1007/978-3-642-38865-1_30
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