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Real-Time FPGA-Based Human Iris Recognition Embedded System: Zero-Delay Human Iris Feature Extraction

  • Conference paper
The 9th International Conference on Computing and InformationTechnology (IC2IT2013)

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 209))

Abstract

Nowadays most of iris recognition algorithms are implemented based on sequential operations running on central processing units (CPUs). Conventional iris recognition systems use a frame grabber to capture a high quality image of an eye, and then system shall locate the pupil and iris boundaries, unwrap the iris image, and extract the iris image features. In this article we propose a prototype design based on pipeline architecture and combinational logic implemented on field-programmable gate array (FPGA). We achieved to speed up the iris recognition process by localizing the pupil and iris boundaries, unwrapping the iris image and extracting features of the iris image while image capturing was in progress. Consequently, live images from human eye can be processed continuously without any delay or lag. We conclude that iris recognition acceleration by pipeline architecture and combinational logic can be a complete success when it is implemented on low-cost FPGAs.

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Author information

Authors and Affiliations

  1. Advanced Informatics School (AIS), Universiti Teknologi Malaysia, 54100, Kuala Lumpur, Malaysia

    Amirshahram Hematian, Suriayati Chuprat, Azizah Abdul Manaf & Nadia Parsazadeh

  2. Center for Artificial Inteligence and Robotics (CAIRO), Universiti Teknologi Malaysia, 54100, Kuala Lumpur, Malaysia

    Sepideh Yazdani

Authors
  1. Amirshahram Hematian
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  2. Suriayati Chuprat
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  3. Azizah Abdul Manaf
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  4. Sepideh Yazdani
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  5. Nadia Parsazadeh
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Corresponding author

Correspondence to Amirshahram Hematian .

Editor information

Editors and Affiliations

  1. Technology North Bangkok, Faculty of Information Technology, King Mongkut's University of, 1518 Pracharat 1 Wongsawang, Bangsue, Bangkok, 10800, Thailand

    Phayung Meesad

  2. , Lehrgebiet Kommunikationsnetze, FernUniversität in Hagen, Universitätsstr. 27, Hagen, 58084, Germany

    Herwig Unger

  3. Technology North Bangkok, Faculty of Information Technology, King Mongkut's University of, 1518 Pracharat 1 Wongsawang, Bangsue, Bangkok, 10800, Thailand

    Sirapat Boonkrong

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Hematian, A., Chuprat, S., Manaf, A.A., Yazdani, S., Parsazadeh, N. (2013). Real-Time FPGA-Based Human Iris Recognition Embedded System: Zero-Delay Human Iris Feature Extraction. In: Meesad, P., Unger, H., Boonkrong, S. (eds) The 9th International Conference on Computing and InformationTechnology (IC2IT2013). Advances in Intelligent Systems and Computing, vol 209. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-37371-8_23

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  • DOI: https://doi.org/10.1007/978-3-642-37371-8_23

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-37370-1

  • Online ISBN: 978-3-642-37371-8

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